Editing HyperTransport (section)

== Implementations ==
* [[AMD]] [[AMD64]] and Direct Connect Architecture based CPUs
* [[AMD]] chipsets
** AMD-8000 series
** [[AMD 580 chipset series|AMD 480 series]]
** [[AMD 580 chipset series|AMD 580 series]]
** [[AMD 690 chipset series|AMD 690 series]]
** [[AMD 700 chipset series|AMD 700 series]]
** [[AMD 800 chipset series|AMD 800 series]]
** [[AMD 900 chipset series|AMD 900 series]]
* [[ATI Technologies|ATI]] chipsets
** ATI [[Xpress 200|Radeon Xpress 200]] for AMD processor
** ATI [[Xpress 3200|Radeon Xpress 3200]] for AMD processor
* [[Broadcom]] (then [[ServerWorks]]) HyperTransport SystemI/O controllers
** HT-2000
** HT-2100
* [[Cisco]] QuantumFlow Processors
* ht_tunnel from [[OpenCores]] project (MPL licence)
* [[IBM]] CPC925 and CPC945 ([[PowerPC G5#Northbridges|PowerPC 970 northbridges]]) chipsets
* [[Loongson]]-3 [[MIPS architecture|MIPS]] processor
* [[Nvidia]] nForce chipsets
** [[nForce]] and [[nForce2]] series (link between North and South Bridges)
** nForce Professional MCPs (Media and Communication Processor)
** [[nForce 3]] series
** [[nForce 4]] series
** [[nForce 500|nForce 500 series]]
** [[nForce 600|nForce 600 series]]
** [[nForce 700|nForce 700 series]]
** [[nForce 900|nForce 900 series]]
* [[PMC-Sierra]] RM9000X2 [[MIPS architecture|MIPS]] CPU
* [[Power Mac G5]]<ref>{{cite web |author=Apple |date=25 June 2003 |title=WWDC 2003 Keynote |url=https://www.youtube.com/watch?v=iwsn27J_tlo |website=YouTube |language=en-US |access-date=October 16, 2009 |archive-url=https://web.archive.org/web/20120708180002/http://www.youtube.com/watch?v=iwsn27J_tlo&gl=US&hl=en |archive-date=July 8, 2012}}</ref>
* [[Raza Microelectronics Inc|Raza]] Thread Processors
* SiByte [[MIPS architecture|MIPS]] CPUs from [[Broadcom]]
* [[Transmeta]] TM8000 Efficeon CPUs
* [[VIA Technologies|VIA]] chipsets K8 series