Editing Integrated circuit (section)

== Generations ==
{{See also|List of semiconductor scale examples|MOS integrated circuit|Transistor count}}

In the early days of simple integrated circuits, the technology's large scale limited each chip to only a few [[transistors]], and the low degree of integration meant the design process was relatively simple. [[First pass yield|Manufacturing yields]] were also quite low by today's standards. As [[MOSFET|metal–oxide–semiconductor]] (MOS) technology progressed, millions and then billions of [[MOS transistor]]s could be placed on one chip,<ref>{{cite web | last=Clarke | first=Peter | title=Intel enters billion-transistor processor era | website=EE Times | date=2005-10-14 | url=http://www.eetimes.com/electronics-products/processors/4079511/Intel-enters-billion-transistor-processor-era | archive-url=https://web.archive.org/web/20110608072423/http://www.eetimes.com/electronics-products/processors/4079511/Intel-enters-billion-transistor-processor-era | archive-date=2011-06-08 | url-status=live}}</ref> and good designs required thorough planning, giving rise to the field of [[electronic design automation]], or EDA.
Some SSI and MSI chips, like [[discrete transistor]]s, are still mass-produced, both to maintain old equipment and build new devices that require only a few gates. The [[7400-series integrated circuits|7400 series]] of [[Transistor–transistor logic|TTL]] chips, for example, has become a [[de facto standard]] and remains in production.

{|class="wikitable sortable"
! Acronym !! Name !! Year !! [[Transistor count]]<ref>{{cite web |last=Dalmau |first=M. |url=http://www.iutbayonne.univ-pau.fr/~dalmau/documents/cours/archi/MICROPancien.pdf |title=Les Microprocesseurs |website=IUT de Bayonne |access-date=7 June 2015 |archive-date=9 August 2017 |archive-url=https://web.archive.org/web/20170809093452/http://www.iutbayonne.univ-pau.fr/~dalmau/documents/cours/archi/MICROPancien.pdf |url-status=dead }}</ref> || [[Logic gate]]s number<ref>{{cite book|language=fr|url=https://books.google.com/books?id=ZbcsAQAAIAAJ&q=ssi+msi+12+99+portes+lsi|title=Bulletin de la Société fribourgeoise des sciences naturelles, Volumes 62 à 63|year=1973}}</ref>
|-
| SSI || ''small-scale integration'' || 1964 || 1 to 10 || 1 to 12
|-
| MSI || ''medium-scale integration'' || 1968 || 10 to 500 || 13 to 99
|-
| LSI|| ''large-scale integration'' || 1971 || 500 to 20 000 || 100 to 9999
|-
| VLSI || ''[[very large-scale integration]]'' || 1980 || 20 000 to 1 000 000 || 10 000 to 99 999
|-
| ULSI || ''ultra-large-scale integration'' || 1984 || 1 000 000 and more || 100 000 and more
|}

===Small-scale integration (SSI) ===
{{Anchor|SSI, MSI and LSI|SSI}}
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The first integrated circuits contained only a few transistors. Early digital circuits containing tens of transistors provided a few logic gates, and early linear ICs such as the [[Plessey]] SL201 or the [[Philips]] TAA320 had as few as two transistors. The number of transistors in an integrated circuit has increased dramatically since then. The term "large scale integration" (LSI) was first used by [[IBM]] scientist [[Rolf Landauer]] when describing the theoretical concept;<ref>{{Cite journal|last=Safir|first=Ruben|date=March 2015|title=System on Chip – Integrated Circuits|url=https://books.google.com/books?id=JsOmCQAAQBAJ&pg=PT39|journal=NYLXS Journal|isbn=9781312995512}}</ref> that term gave rise to the terms "small-scale integration" (SSI), "medium-scale integration" (MSI), "very-large-scale integration" (VLSI), and "ultra-large-scale integration" (ULSI). The early integrated circuits were SSI.

SSI circuits were crucial to early [[aerospace]] projects, and aerospace projects helped inspire development of the technology. Both the [[LGM-30 Minuteman|Minuteman missile]] and [[Apollo program]] needed lightweight digital computers for their inertial guidance systems. Although the [[Apollo Guidance Computer]] led and motivated integrated-circuit technology,<ref>{{cite book |last=Mindell |first=David A. |title=Digital Apollo: Human and Machine in Spaceflight |year=2008 |publisher=The MIT Press |isbn=978-0-262-13497-2}}</ref> it was the Minuteman missile that forced it into mass-production. The Minuteman missile program and various other [[United States Navy]] programs accounted for the total $4 million integrated circuit market in 1962, and by 1968, U.S. Government spending on [[Budget of NASA|space]] and [[Military budget of the United States|defense]] still accounted for 37% of the $312 million total production.

The demand by the U.S. Government supported the nascent integrated circuit market until costs fell enough to allow IC firms to penetrate the [[Industry (manufacturing)|industrial]] market and eventually the [[consumer]] market. The average price per integrated circuit dropped from $50 in 1962 to $2.33 in 1968.<ref>{{cite book| last = Ginzberg| first = Eli| title = Economic impact of large public programs: the NASA Experience| year = 1976| publisher = Olympus Publishing Company| isbn = 978-0-913420-68-3| page = 57 }}</ref> Integrated circuits began to appear in [[consumer product]]s by the turn of the 1970s decade. A typical application was [[Frequency modulation|FM]] inter-carrier sound processing in television receivers.

The first application [[MOSFET|MOS]] chips were small-scale integration (SSI) chips.<ref name="forging"/> Following [[Mohamed M. Atalla]]'s proposal of the [[MOS integrated circuit]] chip in 1960,<ref name="Moskowitz">{{cite book|last1=Moskowitz|first1=Sanford L.|url=https://books.google.com/books?id=2STRDAAAQBAJ&pg=PA165|title=Advanced Materials Innovation: Managing Global Technology in the 21st century|date=2016|publisher=[[John Wiley & Sons]]|isbn=9780470508923|pages=165–167}}</ref> the earliest experimental MOS chip to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at [[RCA]] in 1962.<ref name="computerhistory-digital"/> The first practical application of MOS SSI chips was for [[NASA]] [[satellite]]s.<ref name="forging" />

===Medium-scale integration (MSI) {{Anchor|MSI}}===
The next step in the development of integrated circuits introduced devices which contained hundreds of transistors on each chip, called "medium-scale integration" (MSI).

[[MOSFET scaling]] technology made it possible to build high-density chips.<ref name="computerhistory-transistor"/> By 1964, MOS chips had reached higher [[transistor density]] and lower manufacturing costs than [[bipolar junction transistor|bipolar]] chips.<ref name="ieee"/>

In 1964, [[Frank Wanlass]] demonstrated a single-chip 16-bit [[shift register]] he designed, with a then-incredible 120 [[MOS transistor]]s on a single chip.<ref name="forging">{{cite book | title = We were burning: Japanese entrepreneurs and the forging of the electronic age | author = Johnstone, Bob | publisher = Basic Books | year = 1999 | isbn = 978-0-465-09118-8 | pages = 47–48 | url = https://books.google.com/books?id=PE1bQS9VpWoC&pg=PA47 }}</ref><ref>{{cite web| url = http://www.eecs.umich.edu/eecs/about/articles/2007/Boysel.html| title = Making Your First Million (and other tips for aspiring entrepreneurs)| author = Boysel, Lee | date = 2007-10-12| work = U. Mich. EECS Presentation / ECE Recordings}}</ref> The same year, [[General Microelectronics]] introduced the first commercial [[MOS integrated circuit]] chip, consisting of 120 [[PMOS logic|p-channel MOS]] transistors.<ref name="computerhistory1964"/> It was a 20-bit [[shift register]], developed by Robert Norman<ref name="computerhistory-digital"/> and Frank Wanlass.<ref>{{cite journal |last1=Kilby |first1=J. S. |title=Miniaturized electronic circuits [US Patent No. 3,138, 743] |journal=IEEE Solid-State Circuits Society Newsletter |date=2007 |volume=12 |issue=2 |pages=44–54 |doi=10.1109/N-SSC.2007.4785580 |url=https://www.researchgate.net/publication/245509003 }}</ref><ref>{{cite patent|country=US |status=Patent |number=3138743}}</ref> MOS chips further increased in complexity at a rate predicted by [[Moore's law]], leading to chips with hundreds of [[MOSFET]]s on a chip by the late 1960s.<ref name="ieee"/>

===Large-scale integration (LSI) {{Anchor|LSI}}===
Further development, driven by the same MOSFET scaling technology and economic factors, led to "large-scale integration" (LSI) by the mid-1970s, with tens of thousands of transistors per chip.<ref name="Hittinger">{{cite journal |last1=Hittinger |first1=William C. |title=Metal-Oxide-Semiconductor Technology |journal=Scientific American |date=1973 |volume=229 |issue=2 |pages=48–59 |jstor=24923169 |doi=10.1038/scientificamerican0873-48 |bibcode=1973SciAm.229b..48H }}</ref>

The masks used to process and manufacture SSI, MSI and early LSI and VLSI devices (such as the microprocessors of the early 1970s) were mostly created by hand, often using [[Rubylith]]-tape or similar.<ref>{{cite web |url=https://www.cnet.com/news/intels-accidental-revolution/ |title=Intel's Accidental Revolution |website=CNET|author=Kanellos, Michael |date=January 16, 2002}}</ref> For large or complex ICs (such as [[Computer memory|memories]] or [[Processor (computing)|processors]]), this was often done by specially hired professionals in charge of circuit layout, placed under the supervision of a team of engineers, who would also, along with the circuit designers, inspect and [[Functional verification|verify the correctness and completeness]] of each mask.

Integrated circuits such as 1K-bit RAMs, calculator chips, and the first microprocessors, that began to be manufactured in moderate quantities in the early 1970s, had under 4,000 transistors. True LSI circuits, approaching 10,000 transistors, began to be produced around 1974, for computer main memories and second-generation microprocessors.

=== Very-large-scale integration (VLSI) ===
{{Main|Very-large-scale integration}}
[[File:80486DX2 200x.png|right|thumb|Upper interconnect layers on an [[Intel 80486DX2]] microprocessor die]]

"Very-large-scale integration" ([[VLSI]]) is a development that started with hundreds of thousands of transistors in the early 1980s. As of 2023, maximum [[transistor count]]s continue to grow beyond 5.3 trillion transistors per chip.

Multiple developments were required to achieve this increased density. Manufacturers moved to smaller [[MOSFET]] design rules and [[cleanroom|cleaner fabrication facilities]]. The path of process improvements was summarized by the [[International Technology Roadmap for Semiconductors]] (ITRS), which has since been succeeded by the [[International Roadmap for Devices and Systems]] (IRDS). [[Electronic design automation|Electronic design tools]] improved, making it practical to finish designs in a reasonable time. The more energy-efficient [[CMOS]] replaced [[NMOS logic|NMOS]] and [[PMOS logic|PMOS]], avoiding a prohibitive increase in [[Energy consumption|power consumption]]. The complexity and density of modern VLSI devices made it no longer feasible to check the masks or do the original design by hand. Instead, engineers use {{Abbr|EDA|Electronic design automation}} tools to perform most [[functional verification]] work.<ref>{{cite book |chapter=Engineering for Systems Using Large Scale Integration |title=International Workshop on Managing Requirements Knowledge, Dec. 9 1968 to Dec. 11 1968, San Francisco |page=867 |doi=10.1109/AFIPS.1968.93  |publisher=IEEE Computer Society }}</ref>

In 1986, one-megabit [[random-access memory]] (RAM) chips were introduced, containing more than one million transistors. Microprocessor chips passed the million-transistor mark in 1989, and the billion-transistor mark in 2005.<ref>{{cite web |last1=Clarke |first1=Peter |title=Intel enters billion-transistor processor era |url=https://www.eetimes.com/intel-enters-billion-transistor-processor-era/ |website=EETimes.com |access-date=May 23, 2022 |date=14 October 2005}}</ref> The trend continues largely unabated, with chips introduced in 2007 containing tens of billions of memory transistors.<ref>{{cite web |title=Samsung First to Mass Produce 16Gb NAND Flash Memory |url=https://phys.org/news/2007-04-samsung-mass-16gb-nand-memory.html |website=phys.org |access-date=May 23, 2022 |date=April 30, 2007}}</ref>

=== ULSI, WSI, SoC and 3D-IC ===
{{Further|Wafer-scale integration|System on a chip|Three-dimensional integrated circuit}}
To reflect further growth of the complexity, the term ''ULSI'' that stands for "ultra-large-scale integration" was proposed for chips of more than 1 million transistors.<ref>{{cite journal|last1=Meindl|first1=J.D.|title=Ultra-large scale integration|journal=IEEE Transactions on Electron Devices|volume=31|issue=11|pages=1555–1561|doi=10.1109/T-ED.1984.21752|year=1984|bibcode=1984ITED...31.1555M|s2cid=19237178}}</ref>

[[Wafer-scale integration]] (WSI) is a means of building very large integrated circuits that uses an entire silicon wafer to produce a single "super-chip". Through a combination of large size and reduced packaging, WSI could lead to dramatically reduced costs for some systems, notably massively parallel supercomputers. The name is taken from the term Very-Large-Scale Integration, the current state of the art when WSI was being developed.<ref>{{cite patent|pubdate=1985|inventor-last1=Shanefield|inventor-first1=Daniel|title=Wafer scale integration|status=patent|country=US|number=4866501}}</ref><ref name= wsi2022 >{{cite web | last=Edwards | first=Benj | title=Hungry for AI? New supercomputer contains 16 dinner-plate-size chips | website=Ars Technica | date=2022-11-14 | url=https://arstechnica.com/information-technology/2022/11/hungry-for-ai-new-supercomputer-contains-16-dinner-plate-size-chips/ }}</ref>

A [[system-on-a-chip]] (SoC or SOC) is an integrated circuit in which all the components needed for a computer or other system are included on a single chip. The design of such a device can be complex and costly, and whilst performance benefits can be had from integrating all needed components on one die, the cost of licensing and developing a one-die machine still outweigh having separate devices. With appropriate licensing, these drawbacks are offset by lower manufacturing and assembly costs and by a greatly reduced power budget: because signals among the components are kept on-die, much less power is required (see [[#Packaging|Packaging]]).<ref>{{cite patent|inventor-last1=Klaas|inventor-first1=Jeff|title=System-on-a-chip|pubdate=2000|status=patent|country=US|number=6816750}}</ref> Further, signal sources and destinations are [[Locality of reference|physically closer]] on die, reducing the length of wiring and therefore [[Latency (engineering)|latency]], [[Data transmission|transmission]] power costs and [[waste heat]] from communication between modules on the same chip. This has led to an exploration of so-called [[Network on a chip|Network-on-Chip]] (NoC) devices, which apply system-on-chip design methodologies to digital communication networks as opposed to traditional [[Bus (computing)|bus architectures]].

A [[three-dimensional integrated circuit]] (3D-IC) has two or more layers of active electronic components that are integrated both vertically and horizontally into a single circuit. Communication between layers uses on-die signaling, so power consumption is much lower than in equivalent separate circuits. Judicious use of short vertical wires can substantially reduce overall wire length for faster operation.<ref>{{cite journal|last1=Topol|first1=A.W.|last2=Tulipe|first2=D.C.La|last3=Shi|first3=L|last4=et.|first4=al|title=Three-dimensional integrated circuits|journal=IBM Journal of Research and Development|volume=50|issue=4.5|pages=491–506|doi=10.1147/rd.504.0491|year=2006|s2cid=18432328}}</ref>