Editing Nios II (section)

=== Hardware generation process ===
Nios II hardware designers use the Qsys system integration tool, a component of the Quartus-II package, to configure and generate a Nios system. The configuration [[graphical user interface]] (GUI) allows users to choose the Nios-II's feature-set, and to add peripheral and I/O-blocks (timers, memory-controllers, serial interface, etc.) to the embedded system. When the hardware specification is complete, Quartus-II performs the synthesis, place & route to implement the entire system on the selected FPGA target.<br />
Qsys is replacing the older SOPC (System-on-a-Programmable-Chip) Builder, which could also be used to build a Nios II system, and is being recommended for new projects.<ref name=Altera>{{cite web|title=5 Reasons to Switch from SOPC Builder to Qsys|url=http://www.altera.com/education/webcasts/all/wc-2011-reasons-switch-qsys.html|publisher=Altera|access-date=16 March 2012}}</ref>