Editing 555 timer IC (section)

=== Bistable Schmitt trigger inverter gate ===
{{stack|[[File:555 Bistabiel analoog.svg|thumb|Schematic of a 555 timer in bistable Schmitt trigger inverter mode. Example values C = 100 nF, R1 & R2 = 100 kΩ.]]}}
{{stack|[[File:Inverting Schmitt trigger symbol.svg|thumb|125px|Schmitt trigger inverter symbol]]}}
{{see also|Inverter gate}}

A 555 timer can be used to create a [[Schmitt trigger]] [[Inverter (logic gate)|inverter gate]] with two outputs: output pin is a [[Push–pull output|push-pull]] output, discharge pin is an [[open-collector]] output (requires a [[pull-up resistor]]).

For the schematic on the right, an input signal is [[Capacitive coupling|AC-coupled]] through a low value series capacitor, then biased by identical high-resistance resistors <math>R_1</math> and <math>R_2</math>, which causes the signal to be centered at {{Frac|1|2}} ''V''<sub >cc</sub>.  This centered signal is connected to both the trigger and threshold input pins of the timer.  The input signal must be strong enough to excite the trigger levels of the comparators to exceed the lower {{Frac|1|3}} ''V''<sub>CC</sub> and upper {{Frac|2|3}} ''V''<sub>CC</sub> thresholds in order to cause them to change state, thus providing the Schmitt trigger feature.<ref>{{cite web |title=555 Timer as Schmitt Trigger |url=https://www.electronicshub.org/555-timer-as-schmitt-trigger/ |website=Electronics Hub |archive-url=https://web.archive.org/web/20230315063926/https://www.electronicshub.org/555-timer-as-schmitt-trigger/ |archive-date=March 15, 2023 |date=June 19, 2015 |url-status=live}}</ref>

No timing capacitors are required in a bistable configuration.
{{clear}}