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Binary-coded decimal
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=== Other computers === The Digital Equipment Corporation [[VAX]] series includes [[Instruction set|instructions]] that can perform arithmetic directly on packed BCD data and convert between packed BCD data and other integer representations.<ref name="DEC_1985_VAX11"/> The VAX's packed BCD format is compatible with that on IBM System/360 and IBM's later compatible processors. The MicroVAX and later VAX implementations dropped this ability from the CPU but retained code compatibility with earlier machines by implementing the missing instructions in an operating system-supplied software library. This is invoked automatically via [[exception handling]] when the defunct instructions are encountered, so that programs using them can execute without modification on the newer machines. Many processors have hardware support for BCD-encoded integer arithmetic. For example, the [[6502]],<ref>{{cite web |url=http://www.masswerk.at/6502/6502_instruction_set.html |title=6502 Instruction Set |archive-url=https://web.archive.org/web/20180508053805/http://www.masswerk.at/6502/6502_instruction_set.html |archive-date=2018-05-08 |url-status=live}}</ref><ref>{{cite web |url=http://www.6502.org/tutorials/6502opcodes.html |title=NMOS 6502 Opcodes |archive-url=https://web.archive.org/web/20160114001557/http://www.6502.org/tutorials/6502opcodes.html |archive-date=2016-01-14}}</ref> the [[Motorola 68000 series]],<ref name="Motorola_m68k"/> and the [[x86]] series.<ref>{{cite book|url= http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf|title= Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture|at= Section 4.7|publisher= Intel|date= March 2013|access-date= April 23, 2013|archive-date= April 2, 2013|archive-url= https://web.archive.org/web/20130402233513/http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf|url-status= live}}</ref> The [[Intel]] x86 architecture supports a [[Intel BCD opcodes|unique 18-digit (ten-byte) BCD format]] that can be loaded into and stored from the floating point registers, from where computations can be performed.<ref name="Intel_2020_V1"/> In more recent computers such capabilities are almost always implemented in software rather than the CPU's instruction set, but BCD numeric data are still extremely common in commercial and financial applications. There are tricks for implementing packed BCD and zoned decimal add–or–subtract operations using short but difficult to understand sequences of word-parallel logic and binary arithmetic operations.<ref name="Jones_1999_AT" /> For example, the following code (written in [[C (programming language)|C]]) computes an unsigned 8-digit packed BCD addition using 32-bit binary operations: <syntaxhighlight lang="c"> uint32_t BCDadd(uint32_t a, uint32_t b) { uint32_t t1, t2; // unsigned 32-bit intermediate values t1 = a + 0x06666666; t2 = t1 ^ b; // sum without carry propagation t1 = t1 + b; // provisional sum t2 = t1 ^ t2; // all the binary carry bits t2 = ~t2 & 0x11111110; // just the BCD carry bits t2 = (t2 >> 2) | (t2 >> 3); // correction return t1 - t2; // corrected BCD sum } </syntaxhighlight>
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