Editing TFT LCD (section)

==Electrical interface==
{{unreferenced section|date=January 2012}}
External consumer display devices like a TFT LCD feature one or more [[Analog signal|analog]] [[Video Graphics Array|VGA]], [[Digital Visual Interface|DVI]], [[High-Definition Multimedia Interface|HDMI]], or [[DisplayPort]] interface, with many featuring a selection of these interfaces. Inside external display devices there is a controller board that will convert the video signal using [[color mapping]] and [[image scaling]] usually employing the [[discrete cosine transform]] (DCT) in order to convert any video source like [[Composite video|CVBS]], [[Video Graphics Array|VGA]], [[Digital Visual Interface|DVI]], [[High-Definition Multimedia Interface|HDMI]], etc. into digital [[RGB color model|RGB]] at the native resolution of the display panel. In a laptop the graphics chip will directly produce a signal suitable for connection to the built-in TFT display. A control mechanism for the [[backlight]] is usually included on the same controller board.

The low level interface of [[Super-twisted nematic display|STN]], [[Dual Scan|DSTN]], or TFT display panels use either [[Single-ended signalling|single ended]] [[Transistor–transistor logic|TTL]] 5&nbsp;V signal for older displays or TTL 3.3&nbsp;V for slightly newer displays that transmits the pixel clock, [[Horizontal scan rate|horizontal sync]], [[Analog television#Vertical_synchronization|vertical sync]], [[RGB#Representations|digital red, digital green, digital blue]] in parallel. Some models (for example the AT070TN92) also feature [[Chip select|input/display enable]], horizontal scan direction and vertical scan direction signals.

New and large (>15") TFT displays often use [[Low-voltage differential signaling|LVDS]] signaling that transmits the same contents as the parallel interface (Hsync, Vsync, RGB) but will put control and [[RGB color model|RGB]] bits into a number of serial transmission lines [[Synchronization|synchronized]] to a clock whose rate is equal to the pixel rate. LVDS transmits seven bits per clock per data line, with six bits being data and one bit used to signal if the other six bits need to be inverted in order to maintain DC balance. Low-cost TFT displays often have three data lines and therefore only directly support 18 [[Color depth|bits per pixel]]. Upscale displays have four or five data lines to support 24 bits per pixel ([[Full color|truecolor]]) or 30 bits per pixel respectively. Panel manufacturers are slowly replacing LVDS with Internal DisplayPort and Embedded DisplayPort, which allow sixfold reduction of the number of differential pairs.{{Citation needed|date=January 2012}}

[[Backlight]] intensity is usually controlled by varying a few volts DC, or generating a [[pulse-width modulation|PWM]] signal, or adjusting a [[potentiometer]] or simply fixed. This in turn controls a high-voltage ({{nowrap|1.3 kV}}) [[inverter (electrical)|DC-AC inverter]] or a matrix of [[LED backlight|LED]]s. The method to control the intensity of LED is to pulse them with PWM which can be source of harmonic flicker.{{Citation needed|date=January 2012}}

The bare display panel will only accept a digital video signal at the resolution determined by the panel pixel matrix designed at manufacture. Some screen panels will ignore the [[least significant bit|LSB]] bits of the color information to present a consistent interface (8 bit -> 6 bit/color x3).{{Citation needed|date=January 2012}}

With analogue signals like VGA, the display controller also needs to perform a high speed [[Analog-to-digital converter|analog to digital]] conversion. With digital input signals like DVI or HDMI some simple reordering of the bits is needed before feeding it to the rescaler if the input resolution does not match the display panel resolution.