Editing CPU cache (section)

===Two-way skewed associative cache===
Other schemes have been suggested, such as the ''skewed cache'',<ref name="Seznec" /> where the index for way 0 is direct, as above, but the index for way 1 is formed with a [[hash function]]. A good hash function has the property that addresses which conflict with the direct mapping tend not to conflict when mapped with the hash function, and so it is less likely that a program will suffer from an unexpectedly large number of conflict misses due to a pathological access pattern. The downside is extra latency from computing the hash function.<ref name="CK">{{cite web |author=Kozyrakis |first=C. |title=Lecture 3: Advanced Caching Techniques |url=http://www.stanford.edu/class/ee282/08_handouts/L03-Cache.pdf |url-status=dead |archive-url=https://web.archive.org/web/20120907012034/http://www.stanford.edu/class/ee282/08_handouts/L03-Cache.pdf |archive-date=September 7, 2012}}</ref> Additionally, when it comes time to load a new line and evict an old line, it may be difficult to determine which existing line was least recently used, because the new line conflicts with data at different indexes in each way; [[Cache algorithms|LRU]] tracking for non-skewed caches is usually done on a per-set basis. Nevertheless, skewed-associative caches have major advantages over conventional set-associative ones.<ref>
{{cite web |title=Micro-Architecture |url=https://www.irisa.fr/caps/PROJECTS/Architecture/ |quote=Skewed-associative caches have been shown to have two major advantages over conventional set-associative caches.}}</ref>