Editing List of interface bit rates (section)

===Computer buses===

====Main buses====
{|class="wikitable sortable"
|-
! Technology !! colspan=2 | Rate !! Year
|-
| [[I²C]] || align=right | '''{{val|3.4|u=Mbit/s}}''' || align=right | {{val|425|u=kB/s}} || 1992 (standardized)
|-
| [[Apple II]] (incl. [[Apple IIGS]]) 8-bit/1&nbsp;MHz || align=right | '''{{val|8|u=Mbit/s}}''' || align=right | {{val|1|u=MB/s}}<ref>[https://www.mac-history.net/computer-history/2008-05-25/apple-i-and-apple-ii Mac History]</ref><ref>[http://www.vectronicsappleworld.com/profiles/83.html VAW: Apple IIgs Specs] {{webarchive|url=https://web.archive.org/web/20110110075801/http://www.vectronicsappleworld.com/profiles/83.html |date=2011-01-10}}</ref> || 1977
|-
| [[SS-50 Bus]] 8-bit/1&nbsp;MHz || align=right | '''{{val|8|u=Mbit/s}}''' || align=right | {{val|1|u=MB/s}} || 1975
|-
| [[Unibus]] 16-bit/async || align=right | '''{{val|12|u=Mbit/s}}''' || align=right | {{val|1.5|u=MB/s}} || 1969
|-
| [[STD-80]] 8-bit/8&nbsp;MHz || align=right | '''{{val|16|u=Mbit/s}}''' || align=right | {{val|2|u=MB/s}} ||
|-
| [[Q-bus]] 16-bit/async || align=right | '''{{val|24|u=Mbit/s}}''' || align=right | {{val|3|u=MB/s}} || 1975
|-
| [[Industry Standard Architecture|ISA]] 8-Bit/4.77&nbsp;MHz || align=right | 0 W/S: every 4 clocks 8 bits<br />1 W/S: every 5 clocks 8 bits || align=right | 0 W/S: every 4 clocks 1 byte<br />1 W/S: every 5 clocks 1 byte || 1981 (created)
|-
| STD-80 16-bit/8&nbsp;MHz || align=right | '''{{val|32|u=Mbit/s}}''' || align=right | {{val|4|u=MB/s}} ||
|-
|[[I3C (bus)|I3C (HDR mode)]]<ref>{{cite web |url=http://eecatalog.com/sensors/2017/07/05/after-35-years-of-i2c-i3c-improves-capability-and-performance/ |title=After 35 years of I2C, I3C Improves Capability and Performance {{!}} Sensors and MEMS|website=eecatalog.com|access-date=2019-06-26}}</ref>|| align="right" |'''{{val|33.3|u=Mbit/s}}''' || align=right | {{val|4.16|u=MB/s}} || 2017
|-
| [[Zorro II]] 16-bit/7.14&nbsp;MHz<ref>The [[Zorro II]] bus use 4 clocks per 16-Bit of data transferred. See the [http://www.thule.no/haynie/zorroiii/docs/zorro3.pdf Zorro III technical specification] {{Webarchive|url=https://web.archive.org/web/20120716212151/http://www.thule.no/haynie/zorroiii/docs/zorro3.pdf |date=2012-07-16}} for more information.</ref> || align=right | '''{{val|42.4|u=Mbit/s}}''' || align=right | {{val|5.3|u=MB/s}} || 1986
|-
| [[Industry Standard Architecture|ISA]] 16-Bit/8.33&nbsp;MHz || align=right | '''{{val|66.64|u=Mbit/s}}''' || align=right | {{val|8.33|u=MB/s}} || 1984 (created)
|-
| [[Europe Card Bus]] 8-Bit/10&nbsp;MHz || align=right | '''{{val|66.7|u=Mbit/s}}''' || align=right | {{val|8.33|u=MB/s}} || 1977 (created)
|-
| [[S-100 bus]] 8-bit/10&nbsp;MHz || align=right | '''{{val|80|u=Mbit/s}}''' || align=right | {{val|10|u=MB/s}} || 1976 (published)
|-
| [[Serial Peripheral Interface]] (Up to 100&nbsp;MHz) || align=right | '''{{val|100|u=Mbit/s}}''' || align=right | {{val|12.5|u=MB/s}} || 1989
|-
| [[Low Pin Count]] || align=right | '''{{val|125|u=Mbit/s}}''' || align=right | {{val|15.63|u=MB/s}} {{ref label|lpc|x|x}}|| 2002
|-
| [[STEbus]] 8-Bit/16&nbsp;MHz || align=right | '''{{val|128|u=Mbit/s}}''' || align=right | {{val|16|u=MB/s}} || 1987 (standardized)
|-
| [[C-Bus (PC98)|C-Bus]] 16-bit/10&nbsp;MHz || align=right | '''{{val|160|u=Mbit/s}}''' || align=right | {{val|20|u=MB/s}}<ref>[[:ja:Cバス|Japan wikipedia article]], Bus used in early NEC PC-9800 series and compatible systems</ref> || 1982
|-
| [[HP Precision Bus]] || align=right | '''{{val|184|u=Mbit/s}}''' || align=right | {{val|23|u=MB/s}} ||
|-
| [[STD Bus#STD-32|STD-32]] 32-bit/8&nbsp;MHz || align=right | '''{{val|256|u=Mbit/s}}''' || align=right | {{val|32|u=MB/s}}<ref>[http://www.controlled.com/std32mg/std32.pdf STD 32 Bus Specification and Designer's Guide]</ref> ||
|-
| [[New Extend Standard Architecture|NESA]] 32-bit/8&nbsp;MHz || align=right | '''{{val|256|u=Mbit/s}}''' || align=right | {{val|32|u=MB/s}}<ref>[[:ja:New Extend Standard Architecture|Japan wikipedia article]], Bus used in later NEC PC-9800 series and compatible systems</ref> ||
|-
| [[Extended Industry Standard Architecture|EISA]] 32-bit/8.33&nbsp;MHz || align=right | '''{{val|266.56|u=Mbit/s}}''' || align=right | {{val|33.32|u=MB/s}} || 1988
|-
| [[VMEbus|VME64]] 32-64bit || align=right | '''{{val|400|u=Mbit/s}}''' || align=right | {{val|40|u=MB/s}} || 1981
|-
| [[Micro Channel architecture|MCA]] 32bit/10&nbsp;MHz || align=right | '''{{val|400|u=Mbit/s}}''' || align=right | {{val|40|u=MB/s}} || 1987
|-
| [[NuBus]] 10&nbsp;MHz || align=right | '''{{val|400|u=Mbit/s}}''' || align=right | {{val|40|u=MB/s}} || 1987 (standardized)
|-
| DEC [[TURBOchannel]] 32-bit/12.5&nbsp;MHz || align=right | '''{{val|400|u=Mbit/s}}''' || align=right | {{val|50|u=MB/s}} ||
|-
| NuBus90 20&nbsp;MHz || align=right | '''{{val|800|u=Mbit/s}}''' || align=right | {{val|80|u=MB/s}} || 1991
|-
| [[Micro Channel architecture|MCA]] 32bit/20&nbsp;MHz || align=right | '''{{val|800|u=Mbit/s}}''' || align=right | {{val|80|u=MB/s}}<ref>[https://www.ibm.com/common/ssi/rep_ca/9/877/ENUSZG92-0339/index.html RISC System/6000 POWERstation/POWERserver 580]</ref> || 1992
|-
| [[APbus]] 32-bit/25(?)&nbsp;MHz || align=right | '''{{val|800|u=Mbit/s}}''' || align=right | {{val|100|u=MB/s}}<ref>[https://books.google.com/books?id=XBvHNQzM2P0C&dq=APbus+MIPS+mhz&pg=PA7 Local Area Networks Newsletter by Paul Polishuk, September 1992, Page 7] (APbus used in Sony NeWS and NEC UP4800 workstations and NEC EWS4800 servers after VMEbus and before switch to PCI)</ref> ||
|-
| [[Sbus]] 32-bit/25&nbsp;MHz || align=right | '''{{val|800|u=Mbit/s}}''' || align=right | {{val|100|u=MB/s}} || 1989
|-
| DEC TURBOchannel 32-bit/25&nbsp;MHz || align=right | '''{{val|800|u=Mbit/s}}''' || align=right | {{val|100|u=MB/s}} ||
|-
| [[Local Bus 98]] 32-bit/33&nbsp;MHz || align=right | '''{{val|1056|u=Mbit/s}}''' || align=right | {{val|132|u=MB/s}}<ref>[[:ja:98ローカルバス|Japan wikipedia article]], Bus used in NEC PC-9821 series</ref> ||
|-
| [[VESA Local Bus]] (VLB) 32-bit/33&nbsp;MHz || align=right | '''{{val|1067|u=Mbit/s}}''' || align=right | {{val|133.33|u=MB/s}} || 1992
|-
| [[Peripheral Component Interconnect|PCI]] 32-bit/33&nbsp;MHz || align=right | '''{{val|1067|u=Mbit/s}}''' || align=right | {{val|133.33|u=MB/s}} || 1993
|-
| [[GSC bus|HP GSC-1X]] || align=right | '''{{val|1136|u=Mbit/s}}''' || align=right | {{val|142|u=MB/s}} ||
|-
| [[Zorro III]] 32-bit/[[asynchronous communication|async]] (eq. 37.5&nbsp;MHz)<ref>[[Dave Haynie]], designer of the Zorro III bus, claims in [https://groups.google.com/g/comp.sys.amiga/c/RcwFy7rKylQ/m/kvmjH0ynMsUJ?pli=1 this] posting that the theoretical max of the Zorro III bus can be derived by the timing information given in ''chapter 5'' of the [http://www.thule.no/haynie/zorroiii/docs/zorro3.pdf Zorro III technical specification] {{Webarchive|url=https://web.archive.org/web/20120716212151/http://www.thule.no/haynie/zorroiii/docs/zorro3.pdf |date=2012-07-16}}.</ref><ref>Dave Haynie, designer of the Zorro III bus, states in [http://groups.google.com/group/comp.sys.amiga.advocacy/msg/42ecbcbae063cfe1?dmode=source this] posting that Zorro III is an [[asynchronous I/O|asynchronous]] bus and therefore does not have a classical MHz rating. A maximum theoretical MHz value may be derived by examining timing constraints detailed in the [http://www.thule.no/haynie/zorroiii/docs/zorro3.pdf Zorro III technical specification] {{Webarchive|url=https://web.archive.org/web/20120716212151/http://www.thule.no/haynie/zorroiii/docs/zorro3.pdf |date=2012-07-16}}, which should yield about 37.5 MHz. No existing implementation performs to this level.</ref> || align=right | '''{{val|1200|u=Mbit/s}}''' || align=right | {{val|150|u=MB/s}}<ref>Dave Haynie, designer of the Zorro III bus, claims in [http://groups.google.com/group/comp.sys.amiga.hardware/msg/03b8cec336310e4a?dmode=source this] posting that Zorro III has a max burst rate of 150 MB/s.</ref> || 1990
|-
| VESA Local Bus (VLB) 32-bit/40&nbsp;MHz || align=right | '''{{val|1280|u=Mbit/s}}''' || align=right | {{val|160|u=MB/s}} || 1992
|-
| Sbus 64-bit/25&nbsp;MHz || align=right | '''{{val|1.6|u=Gbit/s}}''' || align=right | {{val|200|u=MB/s}} || 1995
|-
| [[GSC bus|HP GSC-2X]] || align=right | '''{{val|2.048|u=Gbit/s}}''' || align=right | {{val|256|u=MB/s}} ||
|-
| PCI 64-bit/33&nbsp;MHz || align=right | '''{{val|2.133|u=Gbit/s}}''' || align=right | {{val|266.7|u=MB/s}} || 1993
|-
| PCI 32-bit/66&nbsp;MHz || align=right | '''{{val|2.133|u=Gbit/s}}''' || align=right | {{val|266.7|u=MB/s}} || 1995
|-
| [[Accelerated Graphics Port|AGP]] 1× || align=right | '''{{val|2.133|u=Gbit/s}}''' || align=right | {{val|266.7|u=MB/s}} || 1997
|-
| [[PCI Express]] 1.0 (×1 link){{efn|name="pci-e"|Note that PCI Express 1.0/2.0 lanes use an [[8b/10b encoding]] scheme.}} || align=right | '''{{val|2.5|u=Gbit/s}}''' || align=right | {{val|250|u=MB/s}} {{ref label|8b-10b|z|z}} || 2004
|-
| [[RapidIO]] Gen1 1× || align=right | '''{{val|2.5|u=Gbit/s}}''' || align=right | {{val|312.5|u=MB/s}} ||
|-
| HIO bus || align=right | '''{{val|2.560|u=Gbit/s}}''' || align=right | {{val|320|u=MB/s}} ||
|-
| [[GIO]]64 64-bit/40&nbsp;MHz || align=right | '''{{val|2.560|u=Gbit/s}}''' || align=right | {{val|320|u=MB/s}} ||
|-
| PCI Express 2.0 (×1 link){{efn|name="pci-e2"}} || align=right | '''{{val|5|u=Gbit/s}}''' || align=right | {{val|500|u=MB/s}} {{ref label|8b-10b|z|z}} || 2007
|-
| AGP 2× || align=right | '''{{val|4.266|u=Gbit/s}}''' || align=right | {{val|533.3|u=MB/s}} || 1997
|-
| PCI 64-bit/66&nbsp;MHz || align=right | '''{{val|4.266|u=Gbit/s}}''' || align=right | {{val|533.3|u=MB/s}} ||
|-
| [[PCI-X]] DDR 16-bit || align=right | '''{{val|4.266|u=Gbit/s}}''' || align=right | {{val|533.3|u=MB/s}} ||
|-
| [[RapidIO]] Gen2 1× || align=right | '''{{val|5|u=Gbit/s}}''' || align=right | {{val|625|u=MB/s}} ||
|-
| PCI 64-bit/100&nbsp;MHz || align=right | '''{{val|6.4|u=Gbit/s}}''' || align=right | {{val|800|u=MB/s}} ||
|-
| PCI Express 3.0 (×1 link){{efn|name="pci-e3"|PCIe 3.0 increases the bandwidth from 5&nbsp;GT/s to 8&nbsp;GT/s and switches to 128b-130b encoding}} || align=right | '''{{val|8|u=Gbit/s}}''' || align=right | {{val|984.6|u=MB/s}} {{ref label|128b-130b|y|y}} || 2011
|-
| [[Unified Media Interface]] (UMI) (×4 link) || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1|u=GB/s}} {{ref label|8b-10b|z|z}} || 2011
|-
| [[Direct Media Interface]] (DMI) (×4 link) || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1|u=GB/s}} {{ref label|8b-10b|z|z}} || 2004
|-
| [[Enterprise Southbridge Interface]] (ESI) || align=right | '''{{val|8|u=Gbit/s}}''' || align=right | {{val|1|u=GB/s}} ||
|-
| PCI Express 1.0 (×4 link){{efn|name="pci-e"}} || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1|u=GB/s}} {{ref label|8b-10b|z|z}} || 2004
|-
| AGP 4× || align=right | '''{{val|8.533|u=Gbit/s}}''' || align=right | {{val|1.067|u=GB/s}} || 1998
|-
| [[PCI-X]] 133 || align=right | '''{{val|8.533|u=Gbit/s}}''' || align=right | {{val|1.067|u=GB/s}} ||
|-
| PCI-X QDR 16-bit || align=right | '''{{val|8.533|u=Gbit/s}}''' || align=right | {{val|1.067|u=GB/s}} ||
|-
| [[InfiniBand]] single 4×<ref name="infiniband">InfiniBand SDR, DDR and QDR use an [[8b/10b encoding]] scheme.</ref> || align=right | '''{{val|8|u=Gbit/s}}''' || align=right | {{val|1|u=GB/s}} {{ref label|8b-10b|z|z}} ||
|-
| [[RapidIO]] Gen1 4× || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1.25|u=GB/s}} ||
|-
| [[RapidIO]] Gen2 2× || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1.25|u=GB/s}} ||
|-
| [[Ultra Port Architecture|UPA]] || align=right | '''{{val|15.360|u=Gbit/s}}''' || align=right | {{val|1.92|u=GB/s}} ||
|-
| Unified Media Interface 2.0 (UMI 2.0; ×4 link) || align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2|u=GB/s}} {{ref label|8b-10b|z|z}} || 2012
|-
| [[Direct Media Interface]] 2.0 (DMI 2.0; ×4 link) || align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2|u=GB/s}} {{ref label|8b-10b|z|z}} || 2011
|-
| PCI Express 1.0 (×8 link){{efn|name="pci-e"}} || align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2|u=GB/s}} {{ref label|8b-10b|z|z}} || 2004
|-
| PCI Express 2.0 (×4 link){{efn|name="pci-e2"}} || align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2|u=GB/s}} {{ref label|8b-10b|z|z}} || 2007
|-
| AGP 8× || align=right | '''{{val|17.066|u=Gbit/s}}''' || align=right | {{val|2.133|u=GB/s}} || 2002
|-
| PCI-X DDR || align=right | '''{{val|17.066|u=Gbit/s}}''' || align=right | {{val|2.133|u=GB/s}} ||
|-
| [[RapidIO]] Gen2 4× || align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2.5|u=GB/s}} ||
|-
| [[Sun JBus]] (200&nbsp;MHz) || align=right | '''{{val|20.48|u=Gbit/s}}''' || align=right | {{val|2.56|u=GB/s}} || 2003
|-
| [[HyperTransport]] (800&nbsp;MHz, 16-pair) || align=right | '''{{val|25.6|u=Gbit/s}}''' || align=right | {{val|3.2|u=GB/s}} || 2001
|-
| PCI Express 3.0 (×4 link){{efn|name="pci-e3"}} || align=right | '''{{val|32|u=Gbit/s}}''' || align=right | {{val|3.94|u=GB/s}} {{ref label|128b-130b|y|y}} || 2011
|-
| HyperTransport (1&nbsp;GHz, 16-pair) || align=right | '''{{val|32|u=Gbit/s}}''' || align=right | {{val|4|u=GB/s}} ||
|-
| PCI Express 1.0 (×16 link){{efn|name="pci-e"}} || align=right | '''{{val|40|u=Gbit/s}}''' || align=right | {{val|4|u=GB/s}} {{ref label|8b-10b|z|z}} || 2004
|-
| PCI Express 2.0 (×8 link){{efn|name="pci-e2"|PCIe 2.0 effectively doubles the bus standard's bandwidth from 2.5&nbsp;GT/s to 5&nbsp;GT/s}} || align=right | '''{{val|40|u=Gbit/s}}''' || align=right | {{val|4|u=GB/s}} {{ref label|8b-10b|z|z}} || 2007
|-
| PCI-X QDR || align=right | '''{{val|34.133|u=Gbit/s}}''' || align=right | {{val|4.266|u=GB/s}} ||
|-
| AGP 8× 64-bit || align=right | '''{{val|34.133|u=Gbit/s}}''' || align=right | {{val|4.266|u=GB/s}} ||
|-
| [[RapidIO]] Gen2 8x || align=right | '''{{val|40|u=Gbit/s}}''' || align=right | {{val|5|u=GB/s}} ||
|-
| [[Direct Media Interface]] 3.0 (DMI 3.0; ×4 link) || align=right | '''{{val|31.5|u=Gbit/s}}''' || align=right | {{val|3.94|u=GB/s}} {{ref label|128b-130b|y|y}} || 2015
|-
| [[Compute Express Link|CXL Specification 3.0]] & 3.1 (×1 link) || align="right" |'''{{val|60.504|u=Gbit/s}}''' || align=right | {{val|7.563|u=GB/s}}|| 2022, 2023
|-
| PCI Express 3.0 (×8 link){{efn|name="pci-e3"}} || align=right | '''{{val|64|u=Gbit/s}}''' || align=right | {{val|7.88|u=GB/s}} {{ref label|128b-130b|y|y}} || 2011
|-
| PCI Express 2.0 (×16 link){{efn|name="pci-e3"}} || align=right | '''{{val|80|u=Gbit/s}}''' || align=right | {{val|8|u=GB/s}} {{ref label|8b-10b|z|z}} || 2007
|-
| [[RapidIO]] Gen2 16x || align=right | '''{{val|80|u=Gbit/s}}''' || align=right | {{val|10|u=GB/s}} ||
|-
| PCI Express 5.0 (×4 link) || align="right" |'''{{val|128|u=Gbit/s}}''' || align=right | {{val|15.75|u=GB/s}}{{ref label|128b-130b|y|y}}|| 2019
|-
| PCI Express 3.0 (×16 link){{efn|name="pci-e3"}} || align=right | '''{{val|128|u=Gbit/s}}''' || align=right | {{val|15.75|u=GB/s}} {{ref label|128b-130b|y|y}} || 2011
|-
|[[Coherent Accelerator Processor Interface|CAPI]]|| align="right" | '''{{val|128|u=Gbit/s}}''' || align="right" |{{val|15.75|u=GB/s}} {{ref label|128b-130b|y|y}} || 2014
|-
| [[QPI]] (4.80GT/s, 2.40&nbsp;GHz) || align=right | '''{{val|153.6|u=Gbit/s}}''' || align=right | {{val|19.2|u=GB/s}} ||
|-
| HyperTransport 2.0 (1.4&nbsp;GHz, 32-pair) || align=right | '''{{val|179.2|u=Gbit/s}}''' || align=right | {{val|22.4|u=GB/s}} || 2004
|-
| [[QPI]] (5.86GT/s, 2.93&nbsp;GHz) || align=right | '''{{val|187.52|u=Gbit/s}}''' || align=right | {{val|23.44|u=GB/s}} ||
|-
| [[QPI]] (6.40GT/s, 3.20&nbsp;GHz) || align=right | '''{{val|204.8|u=Gbit/s}}''' || align=right | {{val|25.6|u=GB/s}} ||
|-
| [[QPI]] (7.2GT/s, 3.6&nbsp;GHz) || align=right | '''{{val|230.4|u=Gbit/s}}''' || align=right | {{val|28.8|u=GB/s}} || 2012
|-
| PCI Express 6.0 (×4 link) || align="right" |'''{{val|242|u=Gbit/s}}''' || align=right | {{val|30.25|u=GB/s}}{{ref label|242B-256B|w|w}}|| 2022
|-
| PCI Express 4.0 (×16 link)<ref>{{cite news |last1=Born |first1=Eric |title=PCIe 4.0 specification finally out with 16 GT/s on tap |url=https://techreport.com/news/32064/pcie-4-0-specification-finally-out-with-16-gts-on-tap/ |access-date=21 February 2018 |publisher=Tech Report |date=8 June 2017}}</ref> || align=right | '''{{val|256|u=Gbit/s}}''' || align=right | {{val|31.51|u=GB/s}}{{ref label|128b-130b|y|y}}|| 2018
|-
| [[Coherent Accelerator Processor Interface|CAPI 2]] || align=right | '''{{val|256|u=Gbit/s}}''' || align=right | {{val|31.51|u=GB/s}}{{ref label|128b-130b|y|y}} || 2016
|-
| [[QPI]] (8.0GT/s, 4.0&nbsp;GHz) || align=right | '''{{val|256.0|u=Gbit/s}}''' || align=right | {{val|32.0|u=GB/s}} || 2012
|-
| [[QPI]] (9.6GT/s, 4.8&nbsp;GHz) || align=right | '''{{val|307.2|u=Gbit/s}}''' || align=right | {{val|38.4|u=GB/s}} || 2014
|-
| HyperTransport 3.0 (2.6&nbsp;GHz, 32-pair) || align=right | '''{{val|332.8|u=Gbit/s}}''' || align=right | {{val|41.6|u=GB/s}} || 2006
|-
| HyperTransport 3.1 (3.2&nbsp;GHz, 32-pair) || align=right | '''{{val|409.6|u=Gbit/s}}''' || align=right | {{val|51.2|u=GB/s}} || 2008
|-
| [[Compute Express Link|CXL Specification 1.x]] & 2.0 (×16 link) || align="right" |'''{{val|512|u=Gbit/s}}''' || align=right | {{val|63.02|u=GB/s}}|| 2019, 2020
|-
| PCI Express 5.0 (×16 link) <ref>{{cite web |url=https://www.anandtech.com/show/14447/pcisig-finalizes-pcie-50-specification |title=PCI-SIG Finalizes PCIe 5.0 Specification: x16 Slots to Reach 64GB/sec |last=Smith |first=Ryan |website=www.anandtech.com |access-date=2019-06-26}}</ref>|| align="right" |'''{{val|512|u=Gbit/s}}''' || align=right | {{val|63.02|u=GB/s}}{{ref label|128b-130b|y|y}}|| 2019
|-
| [[NVLink]] 1.0 || align=right | '''{{val|640|u=Gbit/s}}''' || align=right | {{val|80|u=GB/s}} || 2016
|-
| PCI Express 6.0 (×16 link) <ref>{{Cite web|url=https://www.anandtech.com/show/17203/pcie-60-specification-finalized-x16-slots-to-reach-128gbps|title = PCI Express 6.0 Specification Finalized: X16 Slots to Reach 128GBps}}</ref> || align="right" |'''{{val|968|u=Gbit/s}}''' || align=right | {{val|121|u=GB/s}}{{ref label|242B-256B|w|w}}|| 2022
|-
| [[Compute Express Link|CXL Specification 3.0]] & 3.1 (×16 link) || align="right" |'''{{val|968|u=Gbit/s}}''' || align=right | {{val|121|u=GB/s}}|| 2022, 2023
|-
| NVLink 2.0 || align=right | '''{{val|1.2|u=Tbit/s}}''' || align=right | {{val|150|u=GB/s}} ||2017
|-
| PCI Express 7.0 (×16 link) || align="right" |'''{{val|1.936|u=Tbit/s}}''' || align=right | {{val|242|u=GB/s}}{{ref label|242B-256B|w|w}}|| 2025
|-
| [[Infinity Fabric]] (Max. theoretical) || align=right | '''{{val|4.096|u=Tbit/s}}''' || align=right | {{val|512|u=GB/s}} ||2017
|}

{{note label|lpc|x|x}} LPC protocol includes high overhead. While the gross data rate equals 33.3 million 4-bit-transfers per second (or {{val|16.67|u=MB/s}}), the fastest transfer, firmware read, results in {{val|15.63|u=MB/s}}. The next fastest bus cycle, 32-bit ISA-style DMA write, yields only {{val|6.67|u=MB/s}}. Other transfers may be as low as {{val|2|u=MB/s}}.<ref name="lpc-spec">[https://www.intel.com/content/www/us/en/design/technologies-and-topics/low-pin-count-interface-specification.html Intel LPC Interface Specification 1.1]</ref>

{{note label|128b-130b|y|y}} Uses [[128b/130b]] encoding, meaning that about 1.54% of each transfer is used for error detection instead of carrying data between the hardware components at each end of the interface. For example, a single link PCIe 3.0 interface has an {{nowrap|8 Gbit/s}} transfer rate, yet its usable bandwidth is only about {{nowrap|7.88 Gbit/s}}.

{{note label|8b-10b|z|z}} Uses [[8b/10b encoding]], meaning that 20% of each transfer is used by the interface instead of carrying data from between the hardware components at each end of the interface. For example, a single link PCIe 1.0 has a {{nowrap|2.5 Gbit/s}} transfer rate, yet its usable bandwidth is only {{nowrap|2 Gbit/s}} (250&nbsp;{{not a typo|MB/s}}).

{{note label|242B-256B|w|w}} Uses [[PAM-4]] encoding and a 256 bytes [[flit (computer networking)|FLIT]] block, of which 14 bytes are [[forward error correction|FEC]] and [[cyclic redundancy check|CRC]], meaning that 5.47% of total data rate is used for error detection and correction instead of carrying data. For example, a single link PCIe 6.0 interface has a {{nowrap|64 Gbit/s}} total transfer rate, yet its usable bandwidth is only {{nowrap|60.5 Gbit/s}}.

====Portable====
{|class="wikitable sortable"
|-
! Technology !! colspan=2 | Rate !! Year
|-
| [[PC Card]] 16-bit 255&nbsp;ns byte mode || align=right | '''{{val|31.36|u=Mbit/s}}''' || align=right | {{val|3.92|u=MB/s}} ||1990
|-
| PC Card 16-bit 255&nbsp;ns word mode || align=right | '''{{val|62.72|u=Mbit/s}}''' || align=right | {{val|7.84|u=MB/s}} ||
|-
| PC Card 16-bit 100&nbsp;ns byte mode || align=right | '''{{val|80|u=Mbit/s}}''' || align=right | {{val|10|u=MB/s}} ||
|-
| PC Card 16-bit 100&nbsp;ns word mode || align=right | '''{{val|160|u=Mbit/s}}''' || align=right | {{val|20|u=MB/s}} ||
|-
| PC Card 32-bit (CardBus) byte mode || align=right | '''{{val|267|u=Mbit/s}}''' || align=right | {{val|33.33|u=MB/s}} ||
|-
| [[ExpressCard]] 1.2 [[USB]] 2.0 mode || align=right | '''{{val|480|u=Mbit/s}}''' || align=right | {{val|60|u=MB/s}} ||2003
|-
| PC Card 32-bit (CardBus) word mode || align=right | '''{{val|533|u=Mbit/s}}''' || align=right | {{val|66.66|u=MB/s}} ||
|-
| PC Card 32-bit (CardBus) doubleword mode || align=right | '''{{val|1067|u=Mbit/s}}''' || align=right | {{val|133.33|u=MB/s}} ||
|-
| ExpressCard 1.2 [[PCI Express]] mode || align=right | '''{{val|2500|u=Mbit/s}}''' || align=right | {{val|250|u=MB/s}} ||2008
|-
| ExpressCard 2.0 USB 3.0 mode || align=right | '''{{val|4800|u=Mbit/s}}''' || align=right | {{val|600|u=MB/s}} ||
|-
| ExpressCard 2.0 PCI Express mode || align=right | '''{{val|5000|u=Mbit/s}}''' || align=right | {{val|625|u=MB/s}} ||2009
|}

====Storage====
{|class="wikitable sortable"
|-
! Technology !! colspan=2 | Rate !! Year
|-
| [[Teletype Model 33]] paper tape || align=right | '''{{val|80|u=bit/s}}''' || align=right | {{val|10|u=B/s}} || 1963
|-
| [[TRS-80]] Model 1 Level 1 BASIC cassette tape interface || align=right | '''{{val|250|u=bit/s}}''' || align=right | {{val|32|u=B/s}} || 1977
|-
| C2N [[Commodore Datasette]] 1530 cassette tape interface || align=right | '''{{val|300|u=bit/s}}''' || align=right | {{val|15|u=B/s}} || 1977
|-
| [[Apple II]] cassette tape interface || align=right | '''{{val|1.5|u=kbit/s}}''' || align=right | {{val|200|u=B/s}} || 1977
|-
| [[Amstrad CPC]] tape || align=right | '''{{val|2.0|u=kbit/s}}''' || align=right | {{val|250|u=B/s}} || 1984
|-
| Single Density 8-inch FM [[Floppy Disk]] Controller (160&nbsp;KB) || align=right | '''{{val|250|u=kbit/s}}''' || align=right | {{val|31|u=KB/s}} || 1973
|-
| Single Density 5.25-inch FM [[Floppy Disk]] Controller (180&nbsp;KB) || align=right | '''{{val|125|u=kbit/s}}''' || align=right | {{val|15.5|u=KB/s}} || 1978
|-
| High Density MFM [[Floppy Disk]] Controller (1.2&nbsp;MB/1.44&nbsp;MB) || align=right | '''{{val|250|u=kbit/s}}''' || align=right | {{val|31|u=KB/s}} || 1984
|-
| CD Controller (1×) || align=right | '''{{val|1.171|u=Mbit/s}}''' || align=right | {{val|0.146|u=MB/s}} || 1988
|-
| [[ST-506|MFM]] hard disk || align=right | '''{{val|5|u=Mbit/s}}''' || align=right | {{val|0.625|u=MB/s}} || 1980
|-
| [[ST-506|RLL]] hard disk || align=right | '''{{val|7.5|u=Mbit/s}}''' || align=right | {{val|0.937|u=MB/s}} ||
|-
| DVD Controller (1×) || align=right | '''{{val|11.1|u=Mbit/s}}''' || align=right | {{val|1.32|u=MB/s}} ||
|-
| [[Massbus]] || align=right | '''{{val|32|u=Mbit/s}}''' || align=right | {{val|2|u=MB/s}} || 1972
|-
| [[Enhanced Small Disk Interface|ESDI]] || align=right | '''{{val|24|u=Mbit/s}}''' || align=right | {{val|3|u=MB/s}} ||
|-
| [[AT Attachment#ATA standards|ATA]] [[programmed input/output|PIO]] Mode 0 || align=right | '''{{val|26.4|u=Mbit/s}}''' || align=right | {{val|3.3|u=MB/s}} || 1986
|-
| HD DVD Controller (1×) || align=right | '''{{val|36|u=Mbit/s}}''' || align=right | {{val|4.5|u=MB/s}} ||
|-
| Blu-ray Controller (1×) || align=right | '''{{val|36|u=Mbit/s}}''' || align=right | {{val|4.5|u=MB/s}} ||
|-
| [[SCSI#Interfaces|SCSI]] (Narrow SCSI) (5&nbsp;MHz){{efn|SCSI-1, SCSI-2 and SCSI-3 are signaling protocols and do not explicitly refer to a specific rate. Narrow SCSI exists using SCSI-1 and SCSI-2. Higher rates use SCSI-2 or later.}} || align=right | '''{{val|40|u=Mbit/s}}''' || align=right | {{val|5|u=MB/s}} || 1986
|-
| [[AT Attachment|ATA]] PIO Mode 1 || align=right | '''{{val|41.6|u=Mbit/s}}''' || align=right | {{val|5.2|u=MB/s}} || 1994
|-
| [[AT Attachment|ATA]] PIO Mode 2 || align=right | '''{{val|66.4|u=Mbit/s}}''' || align=right | {{val|8.3|u=MB/s}} || 1994
|-
| [[SCSI#Interfaces|Fast SCSI]] (8 bits/10&nbsp;MHz) || align=right | '''{{val|80|u=Mbit/s}}''' || align=right | {{val|10|u=MB/s}} ||
|-
| [[AT Attachment|ATA]] PIO Mode 3 || align=right | '''{{val|88.8|u=Mbit/s}}''' || align=right | {{val|11.1|u=MB/s}} || 1996
|-
| [[ATA-over-Ethernet|AoE]] over Fast Ethernet{{efn|name="AoE 1500"|Minimum overhead is 38 byte L1/L2, 14 byte AoE per 1024 byte user data}} || align=right | '''{{val|100|u=Mbit/s}}''' || align=right | {{val|11.9|u=MB/s}} || 2009
|-
| [[iSCSI]] over Fast Ethernet{{efn|name="iSCSI 1500"|Minimum overhead is 38 byte L1/L2, 20 byte IP, 20 byte TCP per 1460 byte user data}} || align=right | '''{{val|100|u=Mbit/s}}''' || align=right | {{val|11.9|u=MB/s}} || 2004
|-
| [[AT Attachment|ATA]] PIO Mode 4 || align=right | '''{{val|133.3|u=Mbit/s}}''' || align=right | {{val|16.7|u=MB/s}} || 1996
|-
| [[SCSI#Interfaces|Fast Wide SCSI]] (16 bits/10&nbsp;MHz) || align=right | '''{{val|160|u=Mbit/s}}''' || align=right | {{val|20|u=MB/s}} ||
|-
| [[SCSI#Interfaces|Ultra SCSI]] (Fast-20 SCSI) (8 bits/20&nbsp;MHz) || align=right | '''{{val|160|u=Mbit/s}}''' || align=right | {{val|20|u=MB/s}} ||
|-
|[[SD card|SD]] (High Speed) || align="right" |'''{{val|200|u=Mbit/s}}''' || align=right | {{val|25|u=MB/s}} ||
|-
| Ultra [[direct memory access|DMA]] [[AT Attachment|ATA]] 33 || align=right | '''{{val|264|u=Mbit/s}}''' || align=right | {{val|33|u=MB/s}} || 1998
|-
| [[SCSI#Interfaces|Ultra Wide SCSI]] (16 bits/20&nbsp;MHz) || align=right | '''{{val|320|u=Mbit/s}}''' || align=right | {{val|40|u=MB/s}} ||
|-
| [[SCSI#Interfaces|Ultra-2 SCSI 40]] (Fast-40 SCSI) (8 bits/40&nbsp;MHz) || align=right | '''{{val|320|u=Mbit/s}}''' || align=right | {{val|40|u=MB/s}} ||
|-
|[[SD card|SDHC/SDXC/SDUC]] (UHS-I Full Duplex) || align="right" |'''{{val|400|u=Mbit/s}}''' || align=right | {{val|50|u=MB/s}} ||
|-
| Ultra DMA [[AT Attachment|ATA]] 66 || align=right | '''{{val|533.6|u=Mbit/s}}''' || align=right | {{val|66.7|u=MB/s}} || 2000
|-
| Blu-ray Controller (16×) || align=right | '''{{val|576|u=Mbit/s}}''' || align=right | {{val|72|u=MB/s}} ||
|-
| [[SCSI#Interfaces|Ultra-2 wide SCSI]] (16 bits/40&nbsp;MHz)|| align=right | '''{{val|640|u=Mbit/s}}''' || align=right | {{val|80|u=MB/s}} ||
|-
| [[Serial Storage Architecture|Serial Storage Architecture SSA]] || align=right | '''{{val|640|u=Mbit/s}}''' || align=right | {{val|80|u=MB/s}} || 1990
|-
| Ultra DMA [[AT Attachment|ATA]] 100 || align=right | '''{{val|800|u=Mbit/s}}''' || align=right | {{val|100|u=MB/s}} || 2002
|-
| [[Fibre Channel]] 1GFC (1.0625&nbsp;GHz){{efn|name=fibre|Fibre Channel 1GFC, 2GFC, 4GFC use an [[8b/10b encoding]] scheme. Fibre Channel 10GFC, which uses a [[64B/66B encoding]] scheme, is not compatible with 1GFC, 2GFC and 4GFC, and is used only to interconnect switches.}} || align=right | '''{{val|850|u=Mbit/s}}''' || align=right | {{val|103.23|u=MB/s}} || 1997
|-
| [[ATA-over-Ethernet|AoE]] over gigabit Ethernet, jumbo frames{{efn|name="AoE 9000"|Minimum overhead is 38 byte L1/L2, 14 byte AoE per 8192 byte user data}} || align=right | '''{{val|1|u=Gbit/s}}''' || align=right | {{val|124.2|u=MB/s}} || 2009
|-
| [[iSCSI]] over gigabit Ethernet, [[jumbo frame]]s{{efn|name="iSCSI 9000"|Minimum overhead is 38 byte L1/L2, 20 byte IP, 20 byte TCP per 8960 byte user data}} || align=right | '''{{val|1|u=Gbit/s}}''' || align=right | {{val|123.9|u=MB/s}} || 2004
|-
| Ultra DMA [[AT Attachment|ATA]] 133 || align=right | '''{{val|1.064|u=Gbit/s}}''' || align=right | {{val|133|u=MB/s}} || 2005
|-
|[[SD card|SDHC/SDXC/SDUC]] (UHS-II Full Duplex) || align="right" |'''{{val|1.25|u=Gbit/s}}''' || align=right | {{val|156|u=MB/s}} ||
|-
| [[SCSI#Interfaces|Ultra-3 SCSI]] (Ultra 160 SCSI; Fast-80 Wide SCSI) (16 bits/40&nbsp;MHz DDR) || align=right | '''{{val|1.28|u=Gbit/s}}''' || align=right | {{val|160|u=MB/s}} ||
|-
| [[SATA revision 1.0]]{{efn|name=satasas|SATA and SAS use an [[8b/10b encoding]] scheme.}} || align=right | '''{{val|1.500|u=Gbit/s}}''' || align=right | {{val|150|u=MB/s}} {{ref label|8b-10b|a|a}} || 2003
|-
| [[Fibre Channel]] 2GFC (2.125&nbsp;GHz){{efn|name=fibre}} || align=right | '''{{val|1.700|u=Gbit/s}}''' || align=right | {{val|206.5|u=MB/s}} || 2001
|-
| [[SCSI#Interfaces|Ultra-320 SCSI]] (Ultra4 SCSI) (16 bits/80&nbsp;MHz DDR) || align=right | '''{{val|2.560|u=Gbit/s}}''' || align=right | {{val|320|u=MB/s}} ||
|-
| [[Serial Attached SCSI]] (SAS) SAS-1{{efn|name=satasas}} || align=right | '''{{val|3|u=Gbit/s}}''' || align=right | {{val|300|u=MB/s}} {{ref label|8b-10b|a|a}} || 2004
|-
| [[SATA Revision 2.0]]{{efn|name=satasas}} || align=right | '''{{val|3|u=Gbit/s}}''' || align=right | {{val|300|u=MB/s}} {{ref label|8b-10b|a|a}} || 2004
|-
|[[SD card|SDHC/SDXC/SDUC]] (UHS-III Full Duplex) || align="right" |'''{{val|2.5|u=Gbit/s}}''' || align=right | {{val|312|u=MB/s}} ||
|-
| [[Fibre Channel]] 4GFC (4.25&nbsp;GHz){{efn|name=fibre}} || align=right | '''{{val|3.4|u=Gbit/s}}''' || align=right | {{val|413|u=MB/s}} || 2004
|-
| [[Serial Attached SCSI]] (SAS) SAS-2{{efn|name=satasas}} || align=right | '''{{val|6|u=Gbit/s}}''' || align=right | {{val|600|u=MB/s}} {{ref label|8b-10b|a|a}} || 2009
|-
| [[SATA Revision 3.0]]{{efn|name=satasas}} || align=right | '''{{val|6|u=Gbit/s}}''' || align=right | {{val|600|u=MB/s}} {{ref label|8b-10b|a|a}} || 2008
|-
| [[Fibre Channel]] 8GFC (8.50&nbsp;GHz){{efn|name=fibre}} || align=right | '''{{val|6.8|u=Gbit/s}}''' || align=right | {{val|826|u=MB/s}} || 2005
|-
|[[SD card|SDHC/SDXC/SDUC]] (SD Express) || align="right" |'''{{val|7.9|u=Gbit/s}}''' || align=right | {{val|985|u=MB/s}} ||
|-
| [[ATA-over-Ethernet|AoE]] over [[10GbE]]{{efn|name="AoE 9000"}} || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1.242|u=GB/s}} || 2009
|-
| [[iSCSI]] over [[10GbE]]{{efn|name="iSCSI 9000"}} || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1.239|u=GB/s}} || 2004
|-
| [[FCoE]] over [[10GbE]]{{efn|name="FCoE"|minimum overhead is 38 byte L1/L2, 36 byte FC per 2048 byte user data}} || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1.206|u=GB/s}} || 2009
|-
| [[Serial Attached SCSI]] (SAS) SAS-3{{efn|name=satasas}} || align=right | '''{{val|12|u=Gbit/s}}''' || align=right | {{val|1.2|u=GB/s}} || 2013
|-
| [[Fibre Channel]] 16GFC (14.025&nbsp;GHz){{efn|name=fibre}} || align=right | '''{{val|13.6|u=Gbit/s}}''' || align=right | {{val|1.652|u=GB/s}} {{ref label|64b-66b|b|b}}|| 2011
|-
| [[SATA Express]] || align=right | '''{{val|16|u=Gbit/s}}''' || align=right | {{val|2|u=GB/s}} || 2013
|-
| [[Serial Attached SCSI]] (SAS) SAS-4 || align=right | '''{{val|22.5|u=Gbit/s}}''' || align=right | {{val|2.4|u=GB/s}} {{ref label|128b-150b|c|c}} || 2017
|-
|[[Universal Flash Storage|UFS]] (version 3.0) || align="right" |'''{{val|23.2|u=Gbit/s}}''' || align=right | {{val|2.9|u=GB/s}} ||2018
|-
| [[Fibre Channel]] 32GFC (28.05&nbsp;GHz){{efn|name=fibre}} || align=right | '''{{val|26.424|u=Gbit/s}}''' || align=right | {{val|3.303|u=GB/s}} {{ref label|64b-66b|b|b}}|| 2016
|-
| [[NVMe]] over [[M.2]] or [[U.2]] (using PCI Express 3.0 ×4 link){{efn|name="pci-e3"}} || align=right | '''{{val|32|u=Gbit/s}}''' || align=right | {{val|3.938|u=GB/s}} || 2013
|-
| [[iSCSI]] over [[InfiniBand]] 4× || align=right | '''{{val|32|u=Gbit/s}}''' || align=right | {{val|4|u=GB/s}} || 2007
|-
| [[NVMe]] over [[M.2]] or [[U.2]] (using PCI Express 4.0 ×4 link) || align=right | '''{{val|64|u=Gbit/s}}''' || align=right | {{val|7.876|u=GB/s}} || 2017
|-
| [[iSCSI]] over 100G Ethernet{{efn|name="iSCSI 9000"}} || align=right | '''{{val|100|u=Gbit/s}}''' || align=right | {{val|12.392|u=GB/s}} || 2010
|-
| [[FCoE]] over 100G Ethernet{{efn|name="FCoE"}} || align=right | '''{{val|100|u=Gbit/s}}''' || align=right | {{val|12.064|u=GB/s}} || 2010
|-
| [[NVMe]] over [[M.2]], [[U.2]], [[U.3]] or [[EDSFF]] (using PCI Express 5.0 ×4 link) || align=right | '''{{val|128|u=Gbit/s}}''' || align=right | {{val|15.754|u=GB/s}} || 2019
|}

{{note label|8b-10b|a|a}} Uses [[8b/10b encoding]]
{{note label|64b-66b|b|b}} Uses [[64b/66b encoding]]
{{note label|128b-150b|c|c}} Uses 128b/150b encoding

====Peripheral====<!-- This section is linked from [[Universal Serial Bus]] -->
{|class="wikitable sortable"
|-
! Technology !! colspan=2 | Rate !! Year
|-
| [[Apple Desktop Bus]] || align=right | '''{{val|10.0|u=kbit/s}}''' || align=right | {{val|1.25|u=kB/s}} || 1986
|-
| [[PS/2 port]] || align=right | '''{{val|12.0|u=kbit/s}}''' || align=right | {{val|1.5|u=kB/s}} || 1987
|-
| Serial [[MIDI]] || align=right | '''{{val|31.25|u=kbit/s}}''' || align=right | {{val|3.9|u=kB/s}} || 1983
|-
| [[Commodore bus|CBM Bus]] max{{efn|Proprietary serial version of [[IEEE-488]] by [[Commodore International]]}}<ref>{{Cite web|url=http://cbmmuseum.kuto.de/floppy.html|title=CCOM - Diskettenlaufwerke und Festplatten}}</ref> || align=right | '''{{val|41.6|u=kbit/s}}''' || align=right | {{val|5.1|u=kB/s}} || 1981
|-
| Serial [[RS-232]] max || align=right | '''{{val|230.4|u=kbit/s}}''' || align=right | {{val|28.8|u=kB/s}} || 1962
|-
| Serial [[DMX512A]] || align=right | '''{{val|250.0|u=kbit/s}}''' || align=right | {{val|31.25|u=kB/s}} || 1998
|-
| [[IEEE 1284|Parallel]] ([[Centronics]]/IEEE 1284) || align="right" | '''{{val|1|u=Mbit/s}}''' || align=right | {{val|125|u=kB/s}} || {{sort|1994|1970 (standardized 1994)}}
|-
| Serial [[16550 UART]] max || align=right | '''{{val|1.5|u=Mbit/s}}''' || align=right | {{val|187.5|u=kB/s}} ||
|-
| [[USB]] 1.0 low speed || align=right | '''{{val|1.536|u=Mbit/s}}''' || align=right | {{val|192|u=kB/s}} || 1996
|-
| Serial [[UART]] max || align=right | '''{{val|2.7648|u=Mbit/s}}''' || align=right | {{val|345.6|u=kB/s}} ||
|-
| GPIB/HPIB (IEEE-488.1) [[IEEE-488]] max. || align=right | '''{{val|8|u=Mbit/s}}''' || align=right | {{val|1|u=MB/s}} || {{sort|1976|Late 1960s (standardized 1976)}}
|-
| Serial [[EIA-422]] max. || align=right | '''{{val|10|u=Mbit/s}}''' || align=right | {{val|1.25|u=MB/s}} ||
|-
| [[USB]] 1.0 full speed || align=right | '''{{val|12|u=Mbit/s}}''' || align=right | {{val|1.5|u=MB/s}} || 1996
|-
| [[IEEE 1284|Parallel]] ([[Centronics]]/IEEE 1284) EPP (Enhanced Parallel Port) || align="right" | '''{{val|16|u=Mbit/s}}''' || align=right | {{val|2|u=MB/s}} || 1992
|-
|Parallel (Centronics/IEEE 1284) ECP (Extended Capability Port) || align="right" | '''{{val|20|u=Mbit/s}}''' || align="right" | {{val|2.5|u=MB/s}} || 1994
|-
| Serial [[EIA-485]] max. || align=right | '''{{val|35|u=Mbit/s}}''' || align=right | {{val|4.375|u=MB/s}} ||
|-
| GPIB/HPIB (IEEE-488.1-2003) [[IEEE-488]] max. || align=right | '''{{val|64|u=Mbit/s}}''' || align=right | {{val|8|u=MB/s}} ||
|-
| [[FireWire]] (IEEE 1394) 100 || align=right | '''{{val|98.304|u=Mbit/s}}''' || align=right | {{val|12.288|u=MB/s}} || 1995
|-
| [[FireWire]] (IEEE 1394) 200 || align=right | '''{{val|196.608|u=Mbit/s}}''' || align=right | {{val|24.576|u=MB/s}} || 1995
|-
| [[FireWire]] (IEEE 1394) 400 || align=right | '''{{val|393.216|u=Mbit/s}}''' || align=right | {{val|49.152|u=MB/s}} || 1995
|-
| [[USB]] 2.0 high speed || align=right | '''{{val|480|u=Mbit/s}}''' || align=right | {{val|60|u=MB/s}} || 2000
|-
| [[FireWire]] (IEEE 1394b) 800<ref name=firewireb>FireWire (IEEE 1394b) uses an [[8b/10b encoding]] scheme.</ref> || align=right | '''{{val|786.432|u=Mbit/s}}''' || align=right | {{val|98.304|u=MB/s}} || 2002
|-
| [[Fibre Channel]] 1&nbsp;Gb [[SCSI]] || align=right | '''{{val|1.0625|u=Gbit/s}}''' || align=right | {{val|100|u=MB/s}} ||
|-
| [[FireWire]] (IEEE 1394b) 1600<ref name=firewireb /> || align=right | '''{{val|1.573|u=Gbit/s}}''' || align=right | {{val|196.6|u=MB/s}} || 2007
|-
| [[Fibre Channel]] 2&nbsp;Gb [[SCSI]] || align=right | '''{{val|2.125|u=Gbit/s}}''' || align=right | {{val|200|u=MB/s}} ||
|-
| [[eSATA]] (SATA 300) || align=right | '''{{val|3|u=Gbit/s}}''' || align=right | {{val|300|u=MB/s}} || 2004
|-
| [[CoaXPress]] Base (up and down bidirectional link) || align=right | '''{{val|3.125|u=Gbit/s}}''' + '''{{val|20.833|u=Mbit/s}}''' || align=right | {{val|390|u=MB/s}} || 2009
|-
| [[FireWire]] (IEEE 1394b) 3200<ref name=firewireb /> || align=right | '''{{val|3.1457|u=Gbit/s}}''' || align=right | {{val|393.216|u=MB/s}} || 2007
|-
| [[Cabled PCI Express|External PCI Express 2.0 ×1]] || align=right | '''{{val|4|u=Gbit/s}}''' || align=right | {{val|500|u=MB/s}} ||
|-
| [[Fibre Channel]] 4&nbsp;Gb [[SCSI]] || align=right | '''{{val|4.25|u=Gbit/s}}''' || align=right | {{val|531.25|u=MB/s}} ||
|-
| [[USB 3.0|USB 3.0 SuperSpeed]] (aka USB<br/>3.1 Gen 1, USB 3.2 Gen 1x1) || align=right | '''{{val|5|u=Gbit/s}}''' || align=right | {{val|500|u=MB/s}} || 2010
|-
| [[eSATA]] (SATA 600) || align=right | '''{{val|6|u=Gbit/s}}''' || align=right | {{val|600|u=MB/s}} || 2011
|-
| [[CoaXPress]] full (up and down bidirectional link) || align=right | '''{{val|6.25|u=Gbit/s}}''' + '''{{val|20.833|u=Mbit/s}}''' || align=right | {{val|781|u=MB/s}} || 2009
|-
| [[Cabled PCI Express|External PCI Express 2.0 ×2]] || align=right | '''{{val|8|u=Gbit/s}}''' || align=right | {{val|1|u=GB/s}} ||
|-
| [[USB 3.0#USB 3.1|USB 3.1 SuperSpeed+]] (aka USB 3.1 Gen 2, USB<br/>3.2 Gen 1x2, USB 3.2 Gen 2x1, USB4 Gen 2×1) || align=right | '''{{val|10|u=Gbit/s}}''' || align=right | {{val|1.212|u=GB/s}} || 2013
|-
| [[Cabled PCI Express|External PCI Express 2.0 ×4]] || align=right | '''{{val|16|u=Gbit/s}}''' || align=right | {{val|2|u=GB/s}} ||
|-
| [[Thunderbolt (Intel)|Thunderbolt]] || align=right | {{sort|{{val|20|u=Gbit/s}}|2 × '''{{val|10|u=Gbit/s}}'''}} || align=right | {{sort|{{val|2500|u=MB/s}}|2 × {{val|1.25|u=GB/s}}}} || 2011
|-
| [[USB 3.0#USB 3.2|USB 3.2 SuperSpeed+]] (aka USB 3.2 Gen<br/>2×2 USB4 Gen 2×2, USB4 Gen 3×1)<ref>{{cite news |last1=Dent |first1=Steve |title=USB 3.2 doubles your connection speeds with the same port |url=https://www.engadget.com/2017/07/26/usb-3-2-doubles-your-connection-speeds-with-the-same-port/ |access-date=26 July 2017 |publisher=Engadget |date=26 July 2017}}</ref>|| align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2.424|u=GB/s}} || 2017
|-
| [[Thunderbolt (Intel)|Thunderbolt 2]] || align=right | '''{{val|20|u=Gbit/s}}''' || align=right | {{val|2.5|u=GB/s}} || 2013
|-
|[[FPGA Mezzanine Card|FPGA Mezzanine Card Plus]] (FMC+)<ref>{{Cite web |title=VITA - Online store product |url=https://www.vita.com/Sys/Store/Products/258953 |access-date=2022-03-23 |website=www.vita.com}}</ref>|| align="right" |'''28 Gbit/s''' || align=right | 3.5 GB/s || 2019
|-
| [[Cabled PCI Express|External PCI Express 2.0 ×8]] || align=right | '''{{val|32|u=Gbit/s}}''' || align=right | {{val|4|u=GB/s}} ||
|-
| [[USB4]] Gen 3×2<ref>{{cite web |url=https://www.anandtech.com/show/14048/usb4-specification-40-gbps-type-c-tb3 |title=USB4 Specification Announced: Adopting Thunderbolt 3 Protocol for 40 Gbps USB |last=Shilov |first=Anton |website=www.anandtech.com |access-date=2019-06-26}}</ref>|| align="right" |'''{{val|40|u=Gbit/s}}''' || align=right | {{val|4.8|u=GB/s}} || 2019
|-
| [[Thunderbolt (Intel)|Thunderbolt 3 two links]] || align=right | '''{{val|40|u=Gbit/s}}''' || align=right | {{val|5|u=GB/s}} || 2015
|-
|[[Thunderbolt 4]]|| align=right | '''{{val|40|u=Gbit/s}}'''|| align=right |{{val|5|u=GB/s}}|| 2020
|-
| [[Cabled PCI Express|External PCI Express 2.0 ×16]] || align=right | '''{{val|64|u=Gbit/s}}''' || align=right | {{val|8|u=GB/s}} ||
|-
| [[USB4]] Gen 4 <ref>{{cite press release |url=https://www.businesswire.com/news/home/20220901005211/en/USB-Promoter-Group-Announces-USB4%C2%AE-Version-2.0 |title=USB Promoter Group Announces USB4® Version 2.0 |website=www.businesswire.com |date=September 2022 |access-date=2022-09-01}}</ref>|| align="right" |'''{{val|80|u=Gbit/s}}''' || align=right | {{val|9.6|u=GB/s}} || 2022
|-
| [[Thunderbolt 5]]|| align=right | '''{{val|80|u=Gbit/s}}'''|| align=right |{{val|9.6|u=GB/s}}|| 2024
|-
| [[USB4]] Gen 4 Asymmetric|| align="right" |'''{{val|120|u=Gbit/s}}''' || align=right | {{val|14.4|u=GB/s}} || 2022
|-
| [[Thunderbolt 5]] Asymmetric|| align=right | '''{{val|120|u=Gbit/s}}'''|| align=right |{{val|14.4|u=GB/s}}|| 2024
|}

====[[Medium access control|MAC]] to [[PHY]]====
{|class="wikitable sortable"
|-
! rowspan="2" | Technology
! rowspan="2" |Channels
! rowspan="2" |Bits
! colspan="3" |[[Multi-gigabit transceiver|MGT]] Lanes!! colspan="2" | Rate !! rowspan="2" | Year
|-
!Count
!Encoding
!Rate
!
!
|-
|[[Media Independent Interface]] (MII)
|1
|4
|
|
| || align="right" |'''{{val|100|u=Mbit/s}}'''|| align="right" |{{val|12.5|u=MB/s}}||
|-
| Reduced MII ([[RMII]])
|1
|2
|
|
| || align="right" |'''{{val|100|u=Mbit/s}}'''|| align="right" |{{val|12.5|u=MB/s}}||
|-
| Serial MII ([[SMII]])
|1
|1
|
|
| || align="right" |'''{{val|100|u=Mbit/s}}'''|| align="right" |{{val|12.5|u=MB/s}}||
|-
| Gigabit MII ([[GMII]])
|1
|8
|
|
| || align="right" |'''{{val|1.0|u=Gbit/s}}'''|| align="right" |{{val|125|u=MB/s}}||
|-
| Reduced gigabit/s MII ([[RGMII]])
|1
|4
|
|
| || align="right" |'''{{val|1.0|u=Gbit/s}}'''|| align="right" |{{val|125|u=MB/s}}||
|-
|Ten-bit interface (TBI)
|1
|10
|
|
|
| align="right" |'''{{val|1.0|u=Gbit/s}}'''
| align="right" |{{val|125|u=MB/s}}
|
|-
| Serial gigabit/s MII ([[SGMII]])
|1
|
|1
|[[8b/10b]]
| align="right" |{{val|1.25|u=Gbit/s}}|| align="right" |'''{{val|1.0|u=Gbit/s}}'''|| align="right" |{{val|125|u=MB/s}}||
|-
| Reduced serial gigabit/s MII ([[RSGMII]])
|2
|
|1
|8b/10b
| align="right" |{{val|2.5|u=Gbit/s}}|| align="right" |'''{{val|2.0|u=Gbit/s}}'''|| align="right" |{{val|250|u=MB/s}}||
|-
| Reduced serial gigabit/s MII plus ([[RSGMII-PLUS]])
|4
|
|1
|8b/10b
| align="right" |{{val|5.0|u=Gbit/s}}|| align="right" |'''{{val|4.0|u=Gbit/s}}'''|| align="right" |{{val|500|u=MB/s}}||
|-
| Quad serial gigabit/s MII ([[QSGMII]])
|4
|
|1
|8b/10b
| align="right" |{{val|5.0|u=Gbit/s}}|| align="right" |'''{{val|4.0|u=Gbit/s}}'''|| align="right" |{{val|500|u=MB/s}}||
|-
| 10 gigabit/s MII ([[XGMII]])
|1
|32
|
|
| || align="right" |'''{{val|10.0|u=Gbit/s}}'''|| align="right" |{{val|1.25|u=GB/s}}||
|-
| XGMII attachment unit interface ([[XAUI]])
|1
|
|4
|8b/10b
| align="right" |{{val|3.125|u=Gbit/s}}|| align="right" |'''{{val|10.0|u=Gbit/s}}'''|| align="right" |{{val|1.25|u=GB/s}}||
|-
|Reduced Pin XAUI (RXAUI)
|1
|
|2
|8b/10b
| align="right" |{{val|6.25|u=Gbit/s}}
| align="right" |'''{{val|10.0|u=Gbit/s}}'''
| align="right" |{{val|1.25|u=GB/s}}
|
|-
|XFI/SFI
|1
|
|1
|[[64b/66b]]
| align="right" |{{val|10.3125|u=Gbit/s}}
| align="right" |'''{{val|10.0|u=Gbit/s}}'''
| align="right" |{{val|1.25|u=GB/s}}
|
|-
|USXGMII
|1
|
|1
|64b/66b
| align="right" |{{val|10.3125|u=Gbit/s}}
| align="right" |'''{{val|10.0|u=Gbit/s}}'''
| align="right" |{{val|1.25|u=GB/s}}
|
|-
|25 gigabit/s MII (25GMII, on-chip only)
|1
|
|
|
|
| align="right" |'''{{val|25.0|u=Gbit/s}}'''
| align="right" |{{val|3.125|u=GB/s}}
|
|-
|25G AUI (25GAUI)
|1
|
|1
|64b/66b
| align="right" |{{val|25.78125|u=Gbit/s}}
| align="right" |'''{{val|25.0|u=Gbit/s}}'''
| align="right" |{{val|3.125|u=GB/s}}
|
|-
| 40 gigabit/s MII ([[XLGMII]], on-chip only)
|1
|
|
|
| || align="right" |'''{{val|40.0|u=Gbit/s}}'''|| align="right" |{{val|5|u=GB/s}}||
|-
| 100 gigabit/s MII ([[CGMII]], on-chip only)
|1
|
|
|
| || align="right" |'''{{val|100.0|u=Gbit/s}}'''|| align="right" |{{val|12.5|u=GB/s}}||2008
|-
|100G AUI (CAUI-10)
|1
|
|10
|64b/66b
| align="right" |{{val|10.3125|u=Gbit/s}}
| align="right" |'''{{val|100.0|u=Gbit/s}}'''
| align="right" |{{val|12.5|u=GB/s}}
|
|-
|100G AUI (CAUI-4)
|1
|
|4
|64b/66b
| align="right" |{{val|25.78125|u=Gbit/s}}
| align="right" |'''{{val|100.0|u=Gbit/s}}'''
| align="right" |{{val|12.5|u=GB/s}}
|
|}

====[[PHY]] to [[XPDR]]====
{|class="wikitable sortable"
|-
! Technology !! colspan=2 | Rate !! Year
|-
| 10 gigabit/s 16-bit interface ([[XSBI]]; 16 lanes) || align=right | '''{{val|0.995|u=Gbit/s}}''' || align=right | {{val|0.124|u=GB/s}} ||
|}