Editing Page table (section)

== Further reading ==
{{refbegin}}
* [[Andrew S. Tanenbaum]], ''Modern Operating Systems'', {{ISBN|0-13-031358-0}}
* [[Abraham Silberschatz|A. Silberschatz]], P. B. Galvin, G. Gagne, ''Operating System Concepts'', {{ISBN|0-471-69466-5}}
* [https://pages.cs.wisc.edu/~remzi/OSTEP Operating Systems: Three Easy Pieces], by Remzi H. Arpaci-Dusseau and Andrea C. Arpaci-Dusseau. Arpaci-Dusseau Books, 2014. Relevant chapters: [https://pages.cs.wisc.edu/~remzi/OSTEP/vm-intro.pdf Address Spaces] [https://pages.cs.wisc.edu/~remzi/OSTEP/vm-mechanism.pdf Address Translation] [https://pages.cs.wisc.edu/~remzi/OSTEP/vm-paging.pdf Introduction to Paging] [https://pages.cs.wisc.edu/~remzi/OSTEP/vm-tlbs.pdf TLBs] [https://pages.cs.wisc.edu/~remzi/OSTEP/vm-smalltables.pdf Advanced Page Tables]
* [https://web.archive.org/web/20111022012609/http://cs.gmu.edu/cne/modules/vm/purple/ptable.html CNE Virtual Memory Tutorial, Center for the New Engineer George Mason University, ''Page Tables'']
* {{cite web|title=Art of Assembler, 6.6 Virtual Memory, Protection, and Paging|url=http://webster.cs.ucr.edu/AoA/Windows/HTML/MemoryArchitecturea3.html|archive-url=https://web.archive.org/web/20120218231434/http://webster.cs.ucr.edu/AoA/Windows/HTML/MemoryArchitecturea3.html|archive-date=February 18, 2012}}
* {{cite web|title=Intel 64 and IA-32 Architectures Software Developer's Manuals|url= https://software.intel.com/en-us/articles/intel-sdm|publisher=Intel|date=January 18, 2018}}
* {{cite web|title=AMD64 Architecture Software Developer's Manual|url=https://www.amd.com/us-en/Processors/DevelopWithAMD/0,,30_2252_875_7044,00.html|publisher=AMD|url-status=dead|archive-url=https://web.archive.org/web/20100313160925/http://www.amd.com/us-en/Processors/DevelopWithAMD/0,,30_2252_875_7044,00.html|archive-date=2010-03-13}}
{{refend}}