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==== 386 ==== The segment address inside the descriptor table entry is expanded to 32 bits so every byte of the physical memory can be defined as bound of the segment. The limit value inside the descriptor table entry is expanded to 20 bits and completed with a granularity flag (G-bit, for short): * If G-bit is zero limit has a granularity of 1 byte, i.e. segment size may be 1, 2, ..., 2<sup>20</sup> bytes. * If G-bit is one limit has a granularity of 2<sup>12</sup> bytes, i.e. segment size may be 1 Γ 2<sup>12</sup>, 2 Γ 2<sup>12</sup>, ..., 2<sup>20</sup> Γ 2<sup>12</sup> bytes. If paging is off, the calculated linear address equals the physical memory address. If paging is on, the calculated linear address is used as input of paging. The 386 processor also uses 32 bit values for the address offset. For maintaining compatibility with 286 protected mode a new default flag (D-bit, for short) was added. If the D-bit of a code segment is off (0) all commands inside this segment will be interpreted as 16-bit commands by default; if it is on (1), they will be interpreted as 32-bit commands.
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