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X86 assembly language
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===SIMD instructions=== Modern x86 CPUs contain [[Single instruction, multiple data|SIMD]] instructions, which largely perform the same operation in parallel on many values encoded in a wide SIMD register. Various instruction technologies support different operations on different register sets, but taken as complete whole (from [[MMX (instruction set)|MMX]] to [[SSE4#SSE4.2|SSE4.2]]) they include general computations on integer or floating-point arithmetic (addition, subtraction, multiplication, shift, minimization, maximization, comparison, division or square root). So for example, <code>paddw mm0, mm1</code> performs 4 parallel 16-bit (indicated by the <code>w</code>) integer adds (indicated by the <code>padd</code>) of <code>mm0</code> values to <code>mm1</code> and stores the result in <code>mm0</code>. [[Streaming SIMD Extensions]] or SSE also includes a floating-point mode in which only the very first value of the registers is actually modified (expanded in [[SSE2]]). Some other unusual instructions have been added including a [[sum of absolute differences]] (used for [[motion estimation]] in [[video compression]], such as is done in [[MPEG]]) and a 16-bit multiply accumulation instruction (useful for software-based alpha-blending and [[digital filter]]ing). SSE (since [[SSE3]]) and [[3DNow!]] extensions include addition and subtraction instructions for treating paired floating-point values like complex numbers. These instruction sets also include numerous fixed sub-word instructions for shuffling, inserting and extracting the values around within the registers. In addition there are instructions for moving data between the integer registers and XMM (used in SSE)/FPU (used in MMX) registers.
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