Editing Magnetic-core memory (section)

====Speed====
The performance of early core memories can be characterized in today's terms as being very roughly comparable to a clock rate of 1&nbsp;[[MHz]] (equivalent to early 1980s home computers, like the [[Apple II]] and [[Commodore 64]]). Early core memory systems had cycle times of about 6&nbsp;[[μs]], which had fallen to 1.2&nbsp;μs by the early 1970s, and by the mid-70s it was down to 600&nbsp;[[nanosecond|ns]] (0.6&nbsp;μs). Some designs had substantially higher performance: the [[CDC 6600]] had a memory cycle time of 1.0&nbsp;μs in 1964, using cores that required a half-select current of 200 mA.<ref>{{cite book |title=Control Data 6600 Training Manual |section=Section 4 |date=June 1965 |publisher=Control Data Corporation |id=Document number 60147400}}</ref> Everything possible was done in order to decrease access times and increase data rates (bandwidth). To mitigate the often slow read times of core memory, read and write operations were often paralellized, with one word's worth of single-bit memory arrays set to work together so that a whole word's worth of memory could be read in a single memory access cycle.