Editing Phase-locked loop (section)

===Frequency synthesis===
In digital wireless communication systems (GSM, CDMA etc.), PLLs are used to provide the local oscillator up-conversion during transmission and [[Digital down converter|down-conversion]] during reception. In most cellular handsets this function has been largely integrated into a single integrated circuit to reduce the cost and size of the handset. However, due to the high performance required of base station terminals, the transmission and reception circuits are built with discrete components to achieve the levels of performance required. GSM local oscillator modules are typically built with a [[frequency synthesizer]] integrated circuit and discrete resonator VCOs.{{Citation needed|date=May 2010}}