Editing Random-access machine (section)

== Examples of models ==

=== Register-to-register ("read-modify-write") model of Cook and Reckhow (1973) ===
The commonly encountered Cook and Rechkow model is a bit like the ternary-register Malzek model (written with Knuth mnemonics{{spaced ndash}}the original instructions had no mnemonics excepting TRA, Read, Print).

:*<code> LOAD ( C, r<sub>d</sub> ) ; C → r<sub>d</sub></code>, C is any integer
:: Example: <code>LOAD ( 0, 5 )</code> will clear register 5.
:*<code> ADD ( r<sub>s1</sub>, r<sub>s2</sub>, r<sub>d</sub>  ) ; [r<sub>s1</sub>] + [r<sub>s2</sub>] → r<sub>d</sub></code>, the registers can be the same or different;
::Example: <code>ADD ( A, A, A )</code> will double the contents of register A.
:*<code> SUB ( r<sub>s1</sub>, r<sub>s2</sub>, r<sub>d</sub> ) ; [r<sub>s1</sub>] - [r<sub>s2</sub>] → r<sub>d</sub></code>, the registers can be the same or different:
::Example: <code>SUB ( 3, 3, 3 )</code> will clear register 3.
:*<code> COPY ( i, r<sub>p</sub>, d, r<sub>d</sub> ) ; [[r<sub>p</sub>] ] →  r<sub>d</sub></code>, Indirectly copy the contents of the source-register pointed to by pointer-register r<sub>p</sub> into the destination register.
:*<code> COPY ( d, r<sub>s</sub>, i, r<sub>p</sub> ) ; [r<sub>s</sub>] → [r<sub>p</sub>]</code>. Copy the contents of source register r<sub>s</sub> into the destination-register pointed to by the pointer-register r<sub>p</sub>.
:*<code> JNZ ( r, I<sub>z</sub> ) ;</code> Conditional jump if [r] is positive; i.e. IF [r] > 0 THEN jump to instruction z else continue in sequence (Cook and Reckhow call this: "TRAnsfer control to line m if Xj > 0")
:*<code> READ ( r<sub>d</sub> ) ;</code> copy "the input" into destination register r<sub>d</sub>
:*<code> PRINT ( r<sub>s</sub> ) ;</code> copy the contents of source register r<sub>s</sub> to "the output."

=== Schönhage's RAM0 and RAM1 (1980) ===
Schönhage (1980) describes a very primitive, atomized model chosen for his proof of the equivalence of his SMM [[pointer machine]] model:
:"In order to avoid any explicit addressing the RAM0 has the accumulator with contents ''z'' and an additional address register with current contents ''n'' (initially 0)" (p. 494)

'''RAM1 model''': Schönhage demonstrates how his construction can be used to form the more common, usable form of "successor"-like RAM (using this article's mnemonics):
::*<code> LDA k ; k --> A </code>, k is a constant, an explicit number such as "47"
::*<code> LDA ( d, r ) ; [r] → A ;</code> directly load A
::*<code> LDA ( i, r ) ; <nowiki>[[r]]</nowiki> → A ;</code> indirectly load A
::*<code> STA ( d, r ) ; [A] → r ;</code> directly store A
::*<code> STA ( i, r ) ; [A] → [r] ;</code> indirectly store A
::*<code> JEA ( r, z ) ; IF [A] = [r] then I<sub>z</sub> else continue</code>
::*<code> INCA ; [A] + 1 --> A </code>

'''RAM0 model''': Schönhage's RAM0 machine has 6 instructions indicated by a single letter (the 6th "C xxx" seems to involve 'skip over next parameter'. Schönhage designated the accumulator with "z", "N" with "n", etc. Rather than Schönhage's mnemonics we will use the mnemonics developed above.
::*<code>(Z), CLRA:  0 → A</code>
::*<code>(A), INCA:  [A] +1 → A</code>
::*<code>(N), CPYAN:  [A] → N</code>
::*<code>(A), LDAA: <nowiki>[[A]]</nowiki> → A </code>; contents of A points to register address; put register's contents into A
::*<code>(S), STAN: [A] → [N] </code>; contents of N points to register address; put contents of A into register pointed to by N
::*<code>(C), JAZ ( z ): [A] = 0 then go to I<sub>z</sub> </code>; ambiguous in his treatment

Indirection comes (i) from CPYAN (copy/transfer contents A to N) working with store_A_via_N STAN, and from (ii) the peculiar indirection instruction <code>LDAA ( <nowiki>[[A]]</nowiki> → [A] )</code>.