Editing Consistency model (section)

=== Weak ordering ===

Weak ordering classifies memory operations into two categories: ''data operations'' and ''synchronization operations''. To enforce program order, a programmer needs to find at least one synchronisation operation in a program. Synchronization operations signal the processor to make sure it has completed and seen all previous operations done by all processors. Program order and atomicity is maintained only on synchronisation operations and not on all reads and writes. This was derived from the understanding that certain memory operations – such as those conducted in a critical section - need not be seen by all processors until after all operations in the critical section are completed. It assumes reordering memory operations to data regions between synchronisation operations does not affect the outcome of the program. This exploits the fact that programs written to be executed on a multi-processor system contain the required synchronization to make sure that data races do not occur and SC outcomes are produced always.<ref>{{Cite web|url=http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-95-7.pdf|title=Shared Memory Consistency Models : A tutorial|access-date=2008-05-28|archive-date=2008-09-07|archive-url=https://web.archive.org/web/20080907125534/http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-95-7.pdf|url-status=dead}}</ref>
{| class="wikitable"
|-
! {{abbr|P|Processor}}1
! {{abbr|P|Processor}}2
|- style="vertical-align:top;"
| {{pre|1=
X = 1;
''fence''
 
xready = 1;
}}
| {{pre|1=
''fence''
while (!xready) {}; 
 
''fence''
 
y = 2;
}}
|}

Coherence is not relaxed in this model. Once these requirements are met, all other "data" operations can be reordered. The way this works is that a counter tracks the number of data operations and until this counter becomes zero, the synchronisation operation isn't issued. Furthermore, no more data operations are issued unless all the previous synchronisations are completed. Memory operations in between two synchronisation variables can be overlapped and reordered without affecting the correctness of the program. This model ensures that write atomicity is always maintained, therefore no additional safety net is required for weak ordering.

In order to maintain weak ordering, write operations prior to a synchronization operation must be globally performed before the synchronization operation. Operations present after a synchronization operation should also be performed only after the synchronization operation completes. Therefore, accesses to synchronization variables is sequentially consistent and any read or write should be performed only after previous synchronization operations have completed.

There is high reliance on explicit synchronization in the program. For weak ordering models, the programmer must use atomic locking instructions such as test-and-set, fetch-and-op, store conditional, load linked or must label synchronization variables or use fences.