Editing Microcode (section)

=={{Anchor|IML}}Writable control store==
{{Main|Writable control store}}

A few computers were built using ''writable microcode''. In this design, rather than storing the microcode in ROM or hard-wired logic, the microcode is stored in a RAM called a ''writable control store'' or ''WCS''. Such a computer is sometimes called a ''writable instruction set computer'' (WISC).<ref>{{cite journal |last=Koopman |first=Philip Jr. |date=1987 |url=http://www.ece.cmu.edu/~koopman/forth/rochester_87.pdf |title=Writable instruction set, stack oriented computers: The WISC Concept |journal=The Journal of Forth Application and Research |pages=49–71 |url-status=live |archive-url=https://web.archive.org/web/20080511192958/http://www.ece.cmu.edu/~koopman/forth/rochester_87.pdf |archive-date=2008-05-11}}</ref>

Many experimental prototype computers use [[#Writable control store|writable control stores]]; there are also commercial machines that use writable microcode, such as the [[Burroughs Small Systems]], early [[Xerox PARC|Xerox]] workstations, the [[Digital Equipment Corporation|DEC]] [[VAX]] 8800 (''Nautilus'') family, the [[Symbolics]] L- and G-machines, a number of IBM System/360 and [[System/370]] implementations, some DEC [[PDP-10]] machines,<ref>{{cite newsgroup |last=Smith |first=Eric |date=3 September 2002 |url=http://pdp10.nocrew.org/cpu/kl10-ucode.txt |title=Re: What was the size of Microcode in various machines |message-id=qhn0qyveyu.fsf@ruckus.brouhaha.com |newsgroup=alt.folklore.computers |access-date=18 December 2008 |url-status=live |archive-url=https://web.archive.org/web/20090126231132/http://pdp10.nocrew.org/cpu/kl10-ucode.txt |archive-date=26 January 2009}}</ref> and the [[Data General Eclipse MV/8000]].<ref>{{cite web |last=Smotherman |first=Mark |title=CPSC 3300 / The Soul of a New Machine |url=https://people.computing.clemson.edu/~mark/330/eagle.html |quote=4096 x 75-bit SRAM writable control store: 74-bit microinstruction with 1 parity bit (18 fields) |access-date=2023-10-27}}</ref>

The IBM System/370 includes a facility called ''Initial-Microprogram Load'' (''IML'' or ''IMPL'')<ref>{{cite book
 |publisher    = IBM
 |title        = IBM System/370 Principles of Operation
 |id           = GA22-7000-4
 |version      = Fourth Edition
 |date         = September 1974
 |url          = http://www.bitsavers.org/pdf/ibm/370/princOps/GA22-7000-4_370_Principles_Of_Operation_Sep75.pdf
 |pages        = 98, 245
 |access-date  = 2012-08-27
 |archive-date = 2012-02-29
 |archive-url  = https://web.archive.org/web/20120229195635/http://bitsavers.org/pdf/ibm/370/princOps/GA22-7000-4_370_Principles_Of_Operation_Sep75.pdf
 |url-status   = live
}}</ref> that can be invoked from the console, as part of ''[[Power-on reset#Power-on reset on IBM mainframes|power-on reset]]'' (''POR'') or from another processor in a [[tightly coupled system|tightly coupled]] [[multiprocessor]] complex.

Some commercial machines, for example IBM 360/85,<ref>{{cite book
 |publisher    = IBM
 |title        = IBM System/360 Model 85 Functional Characteristics
 |id           = A22-6916-1
 |url          = http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A22-6916-1_360-85_funcChar_Jun68.pdf
 |version      = SECOND EDITION
 |date         = June 1968
 |access-date  = October 29, 2021
}}</ref><ref>{{cite book
 | publisher = IBM
 | title     = IBM System/360 Special Feature Description 709/7090/7094 Compatibility Feature for IBM System/360 Model 85
 | id        = GA27-2733-0
 | version   = First Edition
 | date      = March 1969}}</ref> have both a read-only storage and a writable control store for microcode.

WCS offers several advantages including the ease of patching the microprogram and, for certain hardware generations, faster access than ROMs can provide. User-programmable WCS allows the user to optimize the machine for specific purposes.

Starting with the [[Pentium Pro]] in 1995, several [[x86]] CPUs have writable [[Intel Microcode]].<ref name="Stiller_1996">{{cite journal |last1=Stiller |first1=Andreas |last2=Paul |first2=Matthias R.<!-- info contributor on processor internals --> |date=1996-05-12 |title=Prozessorgeflüster |series=Trends & News |language=de |journal=[[c't|c't – magazin für computertechnik]] |publisher=[[Heise Verlag]] |url=https://www.heise.de/ct/artikel/Prozessorgefluester-284546.html |access-date=2017-08-28 |url-status=live |archive-url=https://web.archive.org/web/20170828172141/https://www.heise.de/ct/artikel/Prozessorgefluester-284546.html |archive-date=2017-08-28}}</ref><ref>{{cite book |url=http://www.intel.com/Assets/PDF/manual/253668.pdf |title=Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Part 1 |chapter=9.11: Microcode update facilities |publisher=[[Intel]] |date=September 2016}}</ref> This, for example, has allowed bugs in the [[Intel Core 2]] and Intel [[Xeon]] microcodes to be fixed by patching their microprograms, rather than requiring the entire chips to be replaced. A second prominent example is the set of microcode patches that Intel offered for some of their processor architectures of up to 10 years in age, in a bid to counter the security vulnerabilities discovered in their designs – [[Spectre (security vulnerability)|Spectre]] and [[Meltdown (security vulnerability)|Meltdown]] – which went public at the start of 2018.<ref>[http://www.tomshardware.com/news/intel-meltdown-spectre-patch-silicon,36672.html Intel Patches All Recent CPUs, Promises Hardware Fixes For Upcoming 8th Gen Chips] by Paul Alcorn on March 15, 2018</ref><ref>{{cite web |url=https://downloadcenter.intel.com/download/27591/Linux-Processor-Microcode-Data-File |title=Download Linux* Processor Microcode Data File |access-date=2018-03-21 |url-status=dead |archive-url=https://web.archive.org/web/20180319202103/https://downloadcenter.intel.com/download/27591/Linux-Processor-Microcode-Data-File |archive-date=2018-03-19}}</ref> A microcode update can be installed by Linux,<ref>{{cite web |url=http://urbanmyth.org/microcode/ |title=Intel Microcode Update Utility for Linux |archive-url=https://web.archive.org/web/20120226174302/http://urbanmyth.org/microcode/ |archive-date=2012-02-26 |url-status=dead}}</ref> [[FreeBSD]],<ref>{{cite web |url=https://svnweb.freebsd.org/ports/head/sysutils/cpupdate/ |title=[ports] Index of /head/sysutils/cpupdate |publisher=Freebsd.org |access-date=2020-01-16 |url-status=live |archive-url=https://web.archive.org/web/20200401215701/https://svnweb.freebsd.org/ports/head/sysutils/cpupdate/ |archive-date=2020-04-01}}</ref> Microsoft Windows,<ref>{{Cite news |url=http://support.microsoft.com/kb/936357 |title=A microcode reliability update is available that improves the reliability of systems that use Intel processors |access-date=2008-02-25 |url-status=live |archive-url=https://web.archive.org/web/20080223074207/http://support.microsoft.com/kb/936357 |archive-date=2008-02-23}}</ref> or the motherboard BIOS.<ref>{{cite web |url=http://www.intel.com/support/motherboards/server/sb/cs-021619.htm |title=Server Products - BIOS Update required when Missing Microcode message is seen during POST |date=January 24, 2013 |website=Intel |archive-url=https://web.archive.org/web/20140901063251/http://www.intel.com/support/motherboards/server/sb/cs-021619.htm |archive-date=September 1, 2014}}</ref>

Some machines offer user-programmable writable control stores as an option, including the [[HP 2100]], DEC [[PDP-11|PDP-11/60]], [[TI-990]]/12,<ref>{{cite web |title=Model 990/12 LR Computer Depot Maintenance and Repair Manual |url=http://www.bitsavers.org/pdf/ti/990/990-12/2268241_990-12CPU_DepoRepair_Feb83.pdf |website=Bitsavers.org |publisher=Texas Instruments |access-date=15 February 2024}}</ref><ref>{{cite book |title=Texas Instruments Model 990 Computer MDS-990 Microcode Development System Programmer's Guide |location=Texas Instruments Archives, RG-20 accession 94-08, Box 10, 45C. DeGolyer Library, Southern Methodist University, Dallas, TX USA |edition=15 August 1979}}</ref> and [[Varian Data Machines]] V-70 series [[minicomputer]]s.