Editing Central processing unit (section)

===Integer range===
Every CPU represents numerical values in a specific way. For example, some early digital computers represented numbers as familiar [[decimal]] (base 10) [[numeral system]] values, and others have employed more unusual representations such as [[bi-quinary coded decimal]] (base 2–5) or [[Balanced ternary|ternary]] (base 3). Nearly all modern CPUs represent numbers in [[Binary numeral system|binary]] form, with each digit being represented by some two-valued physical quantity such as a "high" or "low" [[volt]]age.{{Efn|The physical concept of [[voltage]] is an analog one by nature, practically having an infinite range of possible values. For the purpose of physical representation of binary numbers, two specific ranges of voltages are defined, one for logic '0' and another for logic '1'. These ranges are dictated by design considerations such as noise margins and characteristics of the devices used to create the CPU.}}

[[File:Binary Forty.PNG|thumb|left|A six-bit word containing the binary encoded representation of decimal value 40. Most modern CPUs employ word sizes that are a power of two, for example 8, 16, 32 or 64 bits.]]

Related to numeric representation is the size and precision of integer numbers that a CPU can represent. In the case of a binary CPU, this is measured by the number of bits (significant digits of a binary encoded integer) that the CPU can process in one operation, which is commonly called [[Word (data type)|''word size'']], ''bit width'', ''data path width'', ''integer precision'', or ''integer size''. A CPU's integer size determines the range of integer values on which it can directly operate.{{Efn|While a CPU's integer size sets a limit on integer ranges, this can (and often is) overcome using a combination of software and hardware techniques. By using additional memory, software can represent integers many magnitudes larger than the CPU can. Sometimes the CPU's [[instruction set architecture|instruction set]] will even facilitate operations on integers larger than it can natively represent by providing instructions to make large integer arithmetic relatively quick. This method of dealing with large integers is slower than utilizing a CPU with higher integer size, but is a reasonable trade-off in cases where natively supporting the full integer range needed would be cost-prohibitive. See [[Arbitrary-precision arithmetic]] for more details on purely software-supported arbitrary-sized integers.}} For example, an [[8-bit computing|8-bit]] CPU can directly manipulate integers represented by eight bits, which have a range of 256 (2<sup>8</sup>) discrete integer values.

Integer range can also affect the number of memory locations the CPU can directly address (an address is an integer value representing a specific memory location). For example, if a binary CPU uses 32 bits to represent a memory address then it can directly address 2<sup>32</sup> memory locations. To circumvent this limitation and for various other reasons, some CPUs use mechanisms (such as [[memory management unit|memory management]] or [[bank switching]]) that allow additional memory to be addressed.

CPUs with larger word sizes require more circuitry and consequently are physically larger, cost more and consume more power (and therefore generate more heat). As a result, smaller 4- or 8-bit [[microcontroller]]s are commonly used in modern applications even though CPUs with much larger word sizes (such as 16, 32, 64, even 128-bit) are available. When higher performance is required, however, the benefits of a larger word size (larger data ranges and address spaces) may outweigh the disadvantages. A CPU can have internal data paths shorter than the word size to reduce size and cost. For example, even though the [[IBM System/360]] [[instruction set architecture]] was a 32-bit instruction set, the System/360 [[IBM System/360 Model 30|Model 30]] and [[IBM System/360 Model 40|Model 40]] had 8-bit data paths in the arithmetic logical unit, so that a 32-bit add required four cycles, one for each 8 bits of the operands, and, even though the [[Motorola 68000 series]] instruction set was a 32-bit instruction set, the [[Motorola 68000]] and [[Motorola 68010]] had 16-bit data paths in the arithmetic logical unit, so that a 32-bit add required two cycles.

To gain some of the advantages afforded by both lower and higher bit lengths, many [[instruction set architecture|instruction sets]] have different bit widths for integer and floating-point data, allowing CPUs implementing that instruction set to have different bit widths for different portions of the device. For example, the IBM [[System/360]] instruction set was primarily 32 bit, but supported 64-bit [[floating-point arithmetic|floating-point]] values to facilitate greater accuracy and range in floating-point numbers.<ref name="amdahl1964" /> The System/360 Model 65 had an 8-bit adder for decimal and fixed-point binary arithmetic and a 60-bit adder for floating-point arithmetic.<ref>{{cite book|url=http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A22-6884-3_360-65_funcChar.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A22-6884-3_360-65_funcChar.pdf |archive-date=2022-10-09 |url-status=live|title=IBM System/360 Model 65 Functional Characteristics|date=September 1968|publisher=[[IBM]]|pages=8–9|id=A22-6884-3}}</ref> Many later CPU designs use similar mixed bit width, especially when the processor is meant for general-purpose use where a reasonable balance of integer and floating-point capability is required.