Editing Dynamic random-access memory (section)

===Row and column redundancy===
The first DRAM [[integrated circuit]]s did not have any redundancy. An integrated circuit with a defective DRAM cell would be discarded. Beginning with the 64&nbsp;Kbit generation, DRAM arrays have included spare rows and columns to improve yields. Spare rows and columns provide tolerance of minor fabrication defects which have caused a small number of rows or columns to be inoperable. The defective rows and columns are physically disconnected from the rest of the array by a triggering a [[Polyfuse (PROM)|programmable fuse]] or by cutting the wire by a laser. The spare rows or columns are substituted in by remapping logic in the row and column decoders (Jacob, pp.&nbsp;358–361).