Editing Automatic test equipment (section)

==Components==
The semiconductor ATE architecture consists of master controller (usually a [[computer]]) that synchronizes one or more source and capture instruments (listed below). Historically, custom-designed controllers or [[relay]]s were used by ATE systems. The Device Under Test (DUT) is physically connected to the ATE by another robotic machine called a handler or [[wafer prober|prober]] and through a customized Interface Test Adapter (ITA) or "fixture" that adapts the ATE's resources to the DUT.

===Industrial PC===
<!-- Deleted image removed: [[File:apc-industrial-pc-large.jpg|thumb|Industrial PC]] -->

The [[industrial PC]] is a normal desktop computer packaged in 19-inch rack standards with sufficient PCI / PCIe slots for accommodating the Signal stimulator/sensing cards. This takes up the role of a controller in the ATE. Development of test applications and result storage is managed in this PC. Most modern semiconductor ATEs include multiple computer-controlled instruments to source or measure a wide range of parameters. The instruments may include device power supplies (DPS),<ref>{{cite book|url=https://books.google.com/books?id=8P3iLCGbfp0C&q=%22device+power+supplies%22+DPS&pg=PA160|author=Jose Moreira, Hubert Werkmann|title=An Engineer's Guide to Automated Testing of High-Speed Interfaces|publisher=[[Artech House]]|date=2010|isbn=9781607839842|accessdate=2015-10-12}}</ref><ref>{{cite book| url=https://books.google.com/books?id=A6oYzUj1_jYC&q=device+power+supplies+DPS&pg=PA269| title=Demystifying Mixed Signal Test Methods|publisher=[[Elsevier]]|date=3 June 2003|author=Mark Baker| isbn=9780080491066|accessdate=2015-10-12}}</ref> parametric measurement units (PMU), arbitrary waveform generators (AWG), digitizers, digital IOs, and utility supplies. The instruments  perform different measurements on the DUT, and the instruments are synchronized so that they source and measure waveforms at the proper times. Based on the requirement of response-time, real-time systems are also considered for stimulation and signal capturing.

===Mass interconnect===
The [[mass interconnect]] is a connector interface between test instruments (PXI, VXI, LXI, GPIB, SCXI, & PCI) and devices/units under test (D/UUT). This section acts as a nodal point for signals going in/out between ATE and D/UUT.

===Example: Simple voltage measurement===
For example, to measure a voltage of a particular semiconductor device, the Digital Signal Processing (DSP) instruments in the ATE measure the voltage directly and send the results to a computer for signal processing, where the desired value is computed. This example shows that conventional instruments, like an [[ammeter]], may not be used in many ATEs due to the limited number of measurements the instrument could make, and the time it would take to use the instruments to make the measurement. One key advantage to using DSP to measure the parameters is time. If we have to calculate the peak voltage of an electrical signal and other parameters of the signal, then we have to employ a peak detector instrument as well as other instruments to test the other parameters. If DSP-based instruments are used, however, then a sample of the signal is made and the other parameters can be computed from the single measurement.

===Test parameter requirements vs test time===
Not all devices are tested equally. Testing adds costs, so low-cost components are rarely tested completely, whereas medical or high costs components (where reliability is important) are frequently tested.

But testing the device for all parameters may or may not be required depending on the device functionality and end user. For example, if the device finds application in medical or life-saving products then many of its parameters must be tested, and some of the parameters must be guaranteed. But deciding on the parameters to be tested is a complex decision based on cost vs yield. If the device is a complex digital device, with thousands of gates, then test fault coverage has to be calculated. Here again, the decision is complex based on test economics, based on frequency, number and type of I/Os in the device and the end-use application...