Editing Cell (processor) (section)

===Commercialization===
On May 17, 2005, Sony confirmed the Cell configuration used in the [[PlayStation 3]]: one PPE and seven SPEs.<ref name="CELLSpecs">{{Cite web |title=Cell Introduction |url=https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/D21E662845B95D4F872570AB0055404D/$file/2053_IBM_CellIntro.pdf |url-status=dead |archive-url=https://web.archive.org/web/20090326055101/http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/D21E662845B95D4F872570AB0055404D/$file/2053_IBM_CellIntro.pdf |archive-date=March 26, 2009 |access-date=January 14, 2008 |publisher=IBM}}</ref><ref name="e3ign">{{Cite web |last=Roper |first=Chris |date=May 17, 2005 |title=E3 2005: Cell Processor Technology Demos |url=http://gear.ign.com/articles/615/615521p1.html |access-date=March 22, 2007 |website=IGN}}</ref><ref>{{Cite news |last=Becker |first=David |date=February 7, 2005 |title=PlayStation 3 chip has split personality |url=http://news.cnet.com/PlayStation+3+chip+has+split+personality/2100-1043_3-5566340.html?tag=nl |access-date=May 18, 2007 |work=[[CNET]]}}</ref> To improve manufacturing [[Semiconductor device fabrication#Device test|yield]], the processor is initially fabricated with eight SPEs. After production, [[Wafer testing|each chip is tested]], and if a defect is found in one SPE, it is disabled using [[laser trimming]]. This approach minimizes waste by utilizing processors that would otherwise be discarded. Even in chips without defects, one SPE is intentionally disabled to ensure consistency across units.<ref>{{Cite web |title=Sony PlayStation 3 Cell Processor |url=http://moss.csc.ncsu.edu/~mueller/cluster/ps3/ |url-status=live |archive-url=https://web.archive.org/web/20071204202236/http://moss.csc.ncsu.edu/~mueller/cluster/ps3/ |archive-date=December 4, 2007 |access-date=January 14, 2008 |publisher=North Carolina State University}}</ref><ref name="GameDevelMag3">{{Cite news |last=Linklater |first=Martin |title=Optimizing Cell Code |work=Game Developer Magazine, April 2007 |pages=15–18 |quote=To increase fabrication yields, Sony ships PlayStation 3 Cell processors with only seven working SPEs. And from those seven, one SPE will be used by the operating system for various tasks, This leaves six SPEs for game programmer to use.}}</ref> Of the seven operational SPEs, six are available for developers to use in games and applications, while the seventh is reserved for the console's operating system.<ref name="GameDevelMag3" /> The chip operates at a clock speed of 3.2&nbsp;GHz.<ref name="e3witpro">{{Cite news |last=Thurrott |first=Paul |date=May 17, 2005 |title=Sony Ups the Ante with PlayStation 3 |url=http://www.windowsitpro.com/Articles/ArticleID/46431/46431.html?Ad=1 |url-status=dead |archive-url=https://web.archive.org/web/20070930155439/http://www.windowsitpro.com/Articles/ArticleID/46431/46431.html?Ad=1 |archive-date=September 30, 2007 |access-date=March 22, 2007 |publisher=WindowsITPro}}</ref> Sony also used the Cell in its [[Zego]] high-performance media computing server.

The PPE supports [[simultaneous multithreading]] (SMT) and can execute two threads, while each active SPE supports one thread. In the PlayStation 3 configuration, the Cell processor supports up to nine threads.{{Citation needed|date=April 2025}}

On June 28, 2005, IBM and Mercury Computer Systems announced a partnership to use Cell processors in [[embedded systems]] for [[medical imaging]], [[aerospace]], and [[seismic processing]], among other fields.<ref name="mcs">{{Cite news |date=April 12, 2007 |title=Mercury Wins IBM PartnerWorld Beacon Award |url=http://www.supercomputingonline.com/article.php?sid=13477 |access-date=May 18, 2007 |publisher=Supercomputing Online}}{{dead link|date=August 2017|bot=medic}}{{cbignore|bot=medic}}</ref> Mercury use the full Cell processor with eight active SPEs.{{Citation needed|date=April 2025}} Mercury later released [[blade server]]s and [[PCI Express]] accelerator cards based on the architecture.<ref name="gigaaccel180">{{Cite web |date=April 8, 2008 |title=Fixstars Releases Accelerator Board Featuring the PowerXCell 8i |url=http://www.fixstars.com/en/company/press/20080403.html |url-status=dead |archive-url=https://web.archive.org/web/20090105224210/http://www.fixstars.com/en/company/press/20080403.html |archive-date=January 5, 2009 |access-date=August 18, 2008 |publisher=Fixstars Corporation}}</ref>

In 2006, IBM introduced the QS20 blade server, offering up to 410&nbsp;gigaFLOPS per module in single-precision performance. The [[QS22]] blade, based on the PowerXCell 8i, was used in IBM's Roadrunner supercomputer.<ref name="Gaudin 2008" /><ref name="Fildes 2008" /> On April 8, 2008, Fixstars Corporation released a PCI Express accelerator board based on the PowerXCell 8i.<ref name="gigaaccel180" />