Editing Common base (section)

== Low-frequency characteristics ==
At low frequencies and under [[small-signal]] conditions, the circuit in Figure 1 can be represented by that in Figure 2, where the [[hybrid-pi model]] for the BJT has been employed. The input signal is represented by a [[Thévenin's theorem|Thévenin]] voltage source ''v''<sub>s</sub> with a series resistance ''R''<sub>s</sub> and the load is a resistor ''R''<sub>L</sub>.
This circuit can be used to derive the following characteristics of the common base amplifier.

{| class="wikitable" style="text-align:left; margin:1em auto 1em auto 1em auto 1em auto 1em auto;"
!
! Definition
! Expression
! Approximate expression
! Conditions
|-
! Open-circuit [[voltage gain]]
| <math> {A_{v}} = \left. \frac{v_\text{o}}{v_\text{i}} \right|_{R_\text{L} = \infty} </math>
| <math> \frac{(g_m r_\text{o} + 1) R_\text{C}}{R_\text{C} + r_\text{o}}</math>
| <math> g_\text{m} R_\text{C}</math>
| <math> r_\text{o} \gg R_\text{C}</math>
|-
! Short-circuit [[current gain]]
| <math> A_{i} = \left. {i_\text{o} \over i_\text{i}} \right|_{R_\text{L} = 0} </math>
| <math> \frac{r_\pi + \beta r_\text{o}}{r_\pi + (\beta + 1)r_\text{o}}</math>
| <math> 1 </math>
| <math> \beta \gg 1 </math>
|-
! [[Input resistance]]
| <math> R_\text{in} = \frac{v_i}{i_i}</math>
| <math> \frac{(r_\text{o} + R_\text{C} \parallel R_\text{L}) r_\text{E}}{r_\text{o} + r_\text{E} + \frac{R_\text{C} \parallel R_\text{L}}{\beta + 1}}</math>
| <math> r_\text{e} \left( \approx \frac{1}{g_\text{m}} \right) </math>
| <math> r_\text{o} \gg R_\text{C} \parallel R_\text{L}\quad \left(\beta \gg 1\right)</math>
|-
! [[Output resistance]]
| <math> R_\text{out} = \left. \frac{v_\text{o}}{-i_\text{o}} \right|_{v_\text{s} = 0}</math>
| <math> R_\text{C} \parallel \left([1 + g_\text{m} (r_\pi \parallel R_\text{S})]r_\text{o} + r_\pi \parallel R_\text{S}\right)</math>
| <math>\begin{align}
  R_\text{C} &\parallel r_\text{o} \\
  R_\text{C} &\parallel \left(r_\text{o}\left[1 + g_\text{m}\left(r_\pi \parallel R_\text{S}\right)\right]\right)
\end{align}</math>
| <math>\begin{align}
  R_\text{S} &\ll r_\text{E} \\
  R_\text{S} &\gg r_\text{E}
\end{align}</math>
|}

: '''Note:''' Parallel lines (||) indicate [[Series and parallel circuits#Parallel circuits|components in parallel]].

In general, the overall voltage/current gain may be substantially less than the open/short-circuit gains listed above (depending on the source and load resistances) due to the [[loading effect]].

=== Active loads ===

For voltage amplification, the range of allowed output voltage swing in this amplifier is tied to voltage gain when a resistor load ''R''<sub>C</sub> is employed, as in Figure 1. That is, large voltage gain requires large ''R''<sub>C</sub>, and that in turn implies a large DC voltage drop across ''R''<sub>C</sub>. For a given supply voltage, the larger this drop, the smaller the transistor ''V''<sub>CB</sub> and the less output swing is allowed before saturation of the transistor occurs, with resultant distortion of the output signal. To avoid this situation, an [[active load]] can be used, for example, a [[current mirror]]. If this choice is made, the value of ''R''<sub>C</sub> in the table above is replaced by the small-signal output resistance of the active load, which is generally at least as large as the ''r''<sub>O</sub> of the active transistor in Figure 1. On the other hand, the DC voltage drop across the active load has a fixed low value (the '''[[Current mirror#Compliance voltage|compliance voltage]]''' of the active load), much less than the DC voltage drop incurred for comparable gain using a resistor ''R<sub>C</sub>''. That is, an active load imposes less restriction on the output voltage swing. Notice that active load or not, large AC gain still is coupled to large AC output resistance, which leads to poor voltage division at the output except for large loads ''R''<sub>L</sub> ≫ ''R''<sub>out</sub>.

For use as a current buffer, gain is not affected by ''R''<sub>C</sub>, but output resistance is. Because of the current division at the output, it is desirable to have an output resistance for the buffer much larger than the load ''R''<sub>L</sub> being driven, so large signal currents can be delivered to a load. If a resistor ''R''<sub>C</sub> is used, as in Figure 1, a large output resistance is coupled to a large ''R''<sub>C</sub>, again limiting the signal swing at the output. (Even though current is delivered to the load, usually a large current signal into the load implies a large voltage swing across the load as well.) An active load provides high AC output resistance with much less serious impact upon the amplitude of output signal swing.