Editing Cray X-MP (section)

==Extended Architecture series==
Cray Research announced the X-MP Extended Architecture series in 1986. The EA series CPU had an 8.5&nbsp;ns clock cycle (117&nbsp;MHz), and was built from [[macrocell array]] and gate array ICs. The EA series extended the width of the A and B registers to 32 bits and performed 32-bit address arithmetic, increasing the amount of memory theoretically addressable to 2 billion words. The largest configuration produced was 64 million words of MOS SRAM in 64 banks. For compatibility with existing software written for the Cray-1 and older X-MP models, 24-bit addressing was also supported. Each EA series CPU's peak performance was 234&nbsp;MFLOPS. For a four-processor system, the peak performance was 942&nbsp;MFLOPS.{{citation needed|date=April 2009}}