Editing Dual-modulus prescaler (section)

==The solution==
The solution is the dual modulus prescaler. The main divider is split into two parts, the main part N and an additional divider A, which is strictly less than N. Both dividers are clocked from the output of the dual-modulus prescaler, but only the output of the N divider is fed back to the comparator. Initially, the prescaler is set to divide by M&nbsp;+&nbsp;1. Both N and A count down until A reaches zero, at which point the prescaler is switched to a division ratio of M. At this point; the divider N has completed A counts. Counting continues until N reaches zero, which is an additional N&nbsp;-&nbsp;A counts. At this point, the cycle repeats.

<math>
\begin{align}
            &f_o = f_r\left[{M(N-A) + (M+1)A}\right]\\
\Rightarrow &f_o = f_r\left(MN+A\right)
\end{align}</math>

So while we still have a factor of M being multiplied by N, we can add an additional count, A, which effectively gives us a  [[fractional-N synthesizer|divider with a fractional part]]. Only the prescaler needs to be constructed from high-speed parts, and the reference frequency can remain equal to the desired output frequency spacing.

The diagram below shows the elements and arrangement of a [[frequency synthesizer]] with a dual-modulus prescaler. (Compare with the diagram on the main synthesizer page).

[[Image:Dual modulus prescaler frequency synthesiser.svg]]

One can compute A and N from the formulae:

<math>
\begin{align}
 N &= \left\lfloor\frac{V}{M}\right\rfloor\\
 A &= V - MN
\end{align}
</math>

where V is the combined division ratio V = MN+A.  For this to work properly, A must be strictly less than M, as well as less than or equal to N. These restrictions on values of A imply that you can't get every division ratio V. If V falls below M(M&nbsp;-&nbsp;1), some channels will be missing.