Editing Electronic design automation (section)

=== Early days ===
The earliest electronic design automation is attributed to [[IBM]] with the documentation of its [[IBM 700/7000 series|700 series]] computers in the 1950s.<ref name="CHMuseum">{{cite web |title=1966: Computer Aided Design Tools Developed for ICs |url=https://www.computerhistory.org/siliconengine/computer-aided-design-tools-developed-for-ics/ |website=Computer History Museum |access-date=January 1, 2023}}</ref>

Prior to the development of EDA, [[integrated circuit]]s were designed by hand and manually laid out.<ref name="EJournal">{{cite web |title=EDA (Electronic Design Automation) - Where Electronics Begins |url=https://embedjournal.com/eda-where-electronics-begins/ |website=Embed Journal |date=May 25, 2013 |access-date=January 1, 2023}}</ref> Some advanced shops used geometric software to generate tapes for a [[Gerber format|Gerber]] [[photoplotter]], responsible for generating a monochromatic exposure image, but even those copied digital recordings of mechanically drawn components. The process was fundamentally graphic, with the translation from electronics to graphics done manually; the best-known company from this era was [[Calma]], whose [[GDSII]] format is still in use today. By the mid-1970s, developers started to automate circuit design in addition to drafting and the first [[Place and route|placement and routing]] tools were developed; as this occurred, the proceedings of the [[Design Automation Conference]] catalogued the large majority of the developments of the time.<ref name="EJournal"/>

The next era began following the publication of "Introduction to [[Very-large-scale integration|VLSI]] Systems" by [[Carver Mead]] and [[Lynn Conway]] in 1980,<ref>{{Cite book |last1=Meade |first1=Carver |title=Introduction to VLSI Design |last2=Conway |first2=Lynn |publisher=Addison-Wesley}}</ref> and is considered the standard textbook for chip design.<ref name="CMAward">{{cite web |title=Carver Mead Awarded Kyoto Prize by Inamori Foundation |url=https://www.caltech.edu/about/news/carver-mead-awarded-kyoto-prize-by-inamori-foundation |website=Caltech |date=June 17, 2022 |access-date=January 1, 2023}}</ref> The result was an increase in the complexity of the chips that could be designed, with improved access to [[functional verification|design verification]] tools that used [[logic simulation]]. The chips were easier to lay out and more likely to function correctly, since their designs could be simulated more thoroughly prior to construction. Although the languages and tools have evolved, this general approach of specifying the desired behavior in a textual programming language and letting the tools derive the detailed physical design remains the basis of digital IC design today.

The earliest EDA tools were produced academically. One of the most famous was the "Berkeley VLSI Tools Tarball", a set of [[UNIX]] utilities used to design early VLSI systems. Widely used were the [[Espresso heuristic logic minimizer]],<ref>{{cite book |author=Brayton, Robert K., Gary D. Hachtel, Curt McMullen, and Alberto Sangiovanni-Vincentelli |title=Logic minimization algorithms for VLSI synthesis |volume=2 |publisher=Springer Science & Business Media |year=1984}}</ref> responsible for circuit complexity reductions and [[Magic (software)|Magic]],<ref>{{cite journal |author=Ousterhout, John K., Gordon T. Hamachi, Robert N. Mayo, Walter S. Scott, and George S. Taylor |title=The magic VLSI layout system |journal=IEEE Design & Test of Computers |volume=2 |issue=1 |year=1985 |pages=19–30|doi=10.1109/MDT.1985.294681 }}</ref> a computer-aided design platform. Another crucial development was the formation of [[MOSIS]],<ref>{{cite journal |author=Tomovich, Christine |title=MOSIS-A gateway to silicon |journal=IEEE Circuits and Devices Magazine |volume=4 |issue=2 |year=1988 |pages=22–23|doi=10.1109/101.936 }}</ref> a consortium of universities and fabricators that developed an inexpensive way to train student chip designers by producing real integrated circuits. The basic concept was to use reliable, low-cost, relatively low-technology IC processes and pack a large number of projects per [[Wafer (electronics)|wafer]], with several copies of chips from each project remaining preserved. Cooperating fabricators either donated the processed wafers or sold them at cost, as they saw the program as helpful to their own long-term growth.