Editing F-14 CADC (section)

==Components==
The CADC consisted of an [[analog-to-digital converter]], several [[quartz]] pressure sensors, and a number of MOS-based [[microchips]]. Inputs to the system included the primary flight controls, a number of switches, static and dynamic air pressure (for calculating stall points and aircraft speed) and a temperature gauge. The outputs controlled the wing sweep and the maneuver flaps and slats and limited allowable control inputs.<ref>{{cite book |title=NATOPS Flight Manual Navy Model F-14D Aircraft |date=15 Jan 2004 |publisher=Department of the Navy |pages=11-1,20-6,14-42 |url=https://info.publicintelligence.net/F14AAD-1.pdf}}</ref>

The CADC's MP944 chip set ran at 375 kHz, executing 9375 instructions per second and was based on a 20-bit [[Fixed-point arithmetic|fixed-point]]-fraction [[two's complement]] number system. The complete 28-chip system enabled by 74,442 transistors<ref>{{Cite web |title=Ray Holt and the history of MP944/Cadc @ Rome Technopole, 2017 - YouTube |url=https://www.youtube.com/watch?v=3GROYRkWvxc&feature=youtu.be&t=1343 |url-status=live |archive-url=https://web.archive.org/web/20201226121449/https://www.youtube.com/watch?v=3GROYRkWvxc&feature=youtu.be&t=1343 |archive-date=2020-12-26 |access-date=2020-11-06 |website=www.youtube.com}}</ref> used the following 6 unique [[dual in-line package]] (DIP) chips:
{| class="wikitable"
|+
!Chip name
!Abbreviation
!Pin count
!Purpose
!Number of chips used in the system
|-
|[[Read-only memory]]
|ROM
|14
|provides instructions and [[Constant (computer programming)|constants]]
|19
|-
|Steering logic unit
|SLU
|28
|decodes instructions and routes data into a computation unit
|3
|-
|Parallel multiplier unit
|PMU
|28
|computation unit
|1
|-
|Parallel divider unit
|PDU
|28
|computation unit
|1
|-
|Special logic function
|SLF
|28
|computation unit
|1
|-
|Random-access storage
|RAS
|14
|stores data from its computation unit
|3
|}
The system arranges these chips into 3 modules. Each module consists of a set of ROMs which [[Serial communication|serially]] send [[Microcode|microinstructions]] and constants to that module's SLU, which routes data inputs to that module's computation unit (either a PMU, a PDU, or a SLF), whose results are written into that module's RAS and routed via the SLUs to any module. Each module forms its own [[Pipeline (computing)|pipeline]] and can be used without the others. This made it easy to expand the system with additional modules. Multiple pipelines worked at the same time, a [[parallel computing]] technique called "pipeline concurrency". The ROM stores 128 [[Word (computer architecture)|words]] of 20-bits each. A register counter in ROM can be reset, step through the words in sequence, accept a retain address command and hold the present address, and accept a numerical input for address modifying or loading.<ref name=":0" />