Editing Hyper-threading (section)

== History ==
The first published paper describing what is now known as hyper-threading in a general purpose computer was written by Edward S. Davidson and Leonard. E. Shar in 1973.<ref>"A multiminiprocessor system implemented through pipelining", by Leonard Shar and Edward Davidson, IEEE Computer, Feb. 1974, pp. 42-51, vol. 7 https://www.computer.org/csdl/magazine/co/1974/02/4251/13rRUyoyhIt</ref>

[[Denelcor, Inc.]] introduced [[Multithreading (computer architecture)|multi-threading]] with the [[Heterogeneous Element Processor]] (HEP) in 1982. The HEP pipeline could not hold multiple instructions from the same process. Only one instruction from a given process was allowed to be present in the pipeline at any point in time.  Should an instruction from a given process block the pipe, instructions from other processes would continue after the pipeline drained.

US patent for the technology behind hyper-threading was granted to Kenneth Okin at [[Sun Microsystems]] in November 1994.  At that time, [[CMOS]] process technology was not advanced enough to allow for a cost-effective implementation.<ref>{{Citation|last=Okin |first=Kenneth |title=United States Patent: 5361337 - Method and apparatus for rapidly switching processes in a computer system |date=1 November 1994 |url=http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%252Fnetahtml%252FPTO%252Fsrchnum.htm&r=1&f=G&l=50&s1=5361337.PN.&OS=PN/5361337&RS=PN/5361337 |access-date=2016-05-24 |url-status=dead |archive-url=https://web.archive.org/web/20150921143211/http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1 |archive-date=21 September 2015}}</ref>

Intel implemented hyper-threading on an x86 architecture processor in 2002 with the Foster MP-based [[Xeon]]. It was also included on the 3.06&nbsp;GHz Northwood-based Pentium&nbsp;4 in the same year, and then remained as a feature in every Pentium&nbsp;4&nbsp;HT, Pentium&nbsp;4 Extreme Edition and Pentium Extreme Edition processor since. The Intel Core & Core 2 processor lines (2006) that succeeded the Pentium 4 model line didn't utilize hyper-threading. The processors based on the [[Intel Core (microarchitecture)|Core microarchitecture]] did not have hyper-threading because the Core microarchitecture was a descendant of the older [[P6 (microarchitecture)|P6 microarchitecture]]. The P6 microarchitecture was used in earlier iterations of Pentium processors, namely, the [[Pentium Pro]], [[Pentium&nbsp;II]] and [[Pentium&nbsp;III]] (plus their [[Celeron]] & [[Xeon]] derivatives at the time). [[Windows 2000]] SP3 and [[Windows XP SP1]] have added support for hyper-threading.

Intel released the [[Nehalem (microarchitecture)|Nehalem microarchitecture]] (Core&nbsp;i7) in November 2008, in which hyper-threading made a return. The first generation Nehalem processors contained four physical cores and effectively scaled to eight threads. Since then, both two- and six-core models have been released, scaling four and twelve threads respectively.<ref>
{{cite web
 |url=https://www.intel.com/consumer/learn/desktop/corei7-extreme-detail.htm
 |title=Extreme Gaming with the Intel® Core™ i7 Processor Extreme Edition
 |archive-url=https://web.archive.org/web/20081201122911/http://www.intel.com/Consumer/Learn/Desktop/corei7-extreme-detail.htm
 |archive-date=1 December 2008
 |url-status=dead
 |website=www.intel.com}}
</ref> Earlier [[Intel Atom]] cores were in-order processors, sometimes with hyper-threading ability, for low power mobile PCs and low-price desktop PCs.<ref>{{cite web|url=http://www.intel.com/technology/atom/microarchitecture.htm |title=Intel® Atom™ Processor Microarchitecture |publisher=Intel.com |date=2011-03-18 |access-date=2011-04-05}}</ref> The [[Itanium]]&nbsp;9300 launched with eight threads per processor (two threads per core) through enhanced hyper-threading technology. The next model, the Itanium 9500 (Poulson), features a 12-wide issue architecture, with eight CPU cores with support for eight more virtual cores via hyper-threading.<ref>{{cite web|url=http://www.tomshardware.com/news/intel-itanium-poulson-dual-domain-hyper-threading,13279.html |title=Intel Discloses New Itanium Poulson Features |date=24 August 2011 |publisher=Tomshardware.com |access-date=2017-07-02}}</ref> The Intel Xeon&nbsp;5500 server chips also utilize two-way hyper-threading.<ref>{{cite web|url=http://www.intel.com/p/en_US/products/server/processor |title=Server Processor Index Page |publisher=Intel.com |date=2011-03-18 |access-date=2011-04-05}}</ref><ref>{{cite web|url=http://www.intel.com/business/resources/demos/xeon5500/performance/demo.htm |title=Intel Xeon Processor&nbsp;5500 Series |publisher=Intel.com |access-date=2011-04-05}}</ref>