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Instruction set architecture
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==Classification of ISAs== An ISA may be classified in a number of different ways. A common classification is by architectural ''complexity''. A [[complex instruction set computer]] (CISC) has many specialized instructions, some of which may only be rarely used in practical programs. A [[reduced instruction set computer]] (RISC) simplifies the processor by efficiently implementing only the instructions that are frequently used in programs, while the less common operations are implemented as subroutines, having their resulting additional processor execution time offset by infrequent use.<ref>{{cite web |last1=Chen |first1=Crystal |last2=Novick |first2=Greg |last3=Shimano |first3=Kirk |date=December 16, 2006 |title=RISC Architecture: RISC vs. CISC |url=http://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/ |url-status=dead |archive-url=https://web.archive.org/web/20150221071744/http://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/ |archive-date=February 21, 2015 |access-date=February 21, 2015 |website=cs.stanford.edu}}</ref> Other types include VLIW architectures, and the closely related {{citation needed span|''long instruction word'' (LIW)|date=March 2023}} and ''[[explicitly parallel instruction computing]]'' (EPIC) architectures. These architectures seek to exploit [[instruction-level parallelism]] with less hardware than RISC and CISC by making the [[compiler]] responsible for instruction issue and scheduling.<ref>{{cite journal|title=EPIC: Explicitly Parallel Instruction Computing|last1=Schlansker|first1=Michael S.|last2=Rau|first2=B. Ramakrishna|journal=[[Computer (magazine)|Computer]]|date=February 2000|volume=33|issue=2|pages=37β45 |doi=10.1109/2.820037}}</ref> Architectures with even less complexity have been studied, such as the [[minimal instruction set computer]] (MISC) and [[one-instruction set computer]] (OISC). These are theoretically important types, but have not been commercialized.<ref>{{cite journal|url=https://www.researchgate.net/publication/267239549|title=On the Classification of Computer Architecture|last1=Shaout|first1=Adnan|last2=Eldos|first2=Taisir|journal=International Journal of Science and Technology|date=Summer 2003|access-date=March 2, 2023|volume=14|page=3}}</ref><ref>{{cite book|title=Computer Architecture: A Minimalist Perspective|last1=Gilreath|first1=William F.|last2=Laplante|first2=Phillip A.|publisher=[[Springer Science+Business Media]]|date=December 6, 2012|isbn=978-1-4615-0237-1}}</ref>
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