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Internet Radio Linking Project
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==Requirements== ===Computer=== * A dedicated IBM compatible computer, Pentium class (Intel, AMD etc.), running a processor clocked at least 200 MHz * At least 128 MB of RAM * A dedicated hard drive of at least 2 GB * Basic (legacy) parallel port running LPT1 (0x378/9) * Soundcard β most PCI cards work as do many motherboard based chipsets * Ethernet Adapter (Network Card) connected to the Internet ===Operating system=== [[Linux]] is the [[operating system]] (OS) of choice for IRLP, as it allows the best in reliability, programmability, efficiency, and functionality. Some older IRLP nodes use the [[Red Hat Linux|Red Hat]] 7.3 or Red Hat 9 distribution, as they were very stable releases and ran very smoothly on any [[Pentium (original)|Pentium]] or better computer. In 2005, a custom version of [[Fedora Linux|Fedora]] Core 3 was introduced, followed by Fedora Core 5 in 2006. As of March 2007, IRLP no longer supports Red Hat and started shipping with the [[CentOS]] 4 distribution. As of December 2012, IRLP has released a final version of CentOS 4.9, but now supports Debian as its operating system of choice. This release provides greatly improved operation with more support for varying hardware. ===IRLP hardware=== An IRLP board is required to interface to the radio. Currently version 3.0 IRLP boards are available fully assembled and tested. Each board comes complete with all the cables between the board and computer parallel port (with sub-hoods) and terminates in a male DE-9 connector for interface into the radio. A cable terminated in a female DE-9 plugs into the IRLP board and interfaces to a radio/repeater/controller. Two mono or stereo 1/8" audio plugs connect to the computer's sound card. The audio circuitry is the owner's responsibility. The IRLP board is a very simple circuit, the most difficult part being the [[DTMF]] decoder which consists of a MT8870 (or similar) DTMF decoder IC and HCF4081 (or similar) and-gate IC. Two chips are needed because the MT8870 has latched outputs, and the IRLP software looks for short pulses at the parallel port pins 10,12,13,15 in order to acknowledge a DTMF digit. MT8870 pin 15 provides a pulse when any valid DTMF digit is decoded, so this signal is used on one input of each gate on the HCF4081. The other gate input is from MT8870 pins 11,12,13,14. The output of the HCF4081 (pins 3,4,10,11) connect to the parallel port and provide the pulsed input that IRLP needs. The IRLP software cannot decode the D digit (the bottom right key on a 16-button DTMF dial). This is a limitation of the hardware in the decoder. DTMF digit D is logic level 0 on all 4 bits from the MT8870. Thus, the parallel port pins would all be at 0 volts, which IRLP regards as no DTMF digit present. The IRLP board does not pass the MT8870's strobe pin to the PC, if it did that would enable digit D detection. The IRLP board has no audio transformers or bypass capacitors. It is merely a DTMF decoder circuit with a simple COS and PTT circuit installed. Version 3 boards also have simple FET switches for the AUX 1,2 and 3 functions.
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