Editing MOS Technology 8502 (section)

===Memory access in 8-bit machines===
Common [[random-access memory]] (RAM) of the Commodore C64-era allowed accesses at 2&nbsp;MHz. If the CPU and display chip both shared the same memory to communicate, which was the common solution in the era when RAM was expensive, then one would normally have to have the CPU and [[video display controller|display chip]] arbitrate access to the bus so that only one of them used it at a time, generally by having one of them pause the other. Assuming the two chips require roughly equal access, that means the chips are paused half of the time, each effectively running at 1&nbsp;MHz.{{efn|In practice, due to the timing of television signals, the CPU does have more time available on the bus than the display chip.}}

The 6502-family had a feature that eased the design of such systems. The 6502 used a two-phase clock to drive its internal circuitry, but only accessed memory during one of the two phases. That meant the display chip could access memory during alternating clock phases without having to pause the CPU. The major advantage of this style of access is that the two chips do not have to communicate to pause each other, they simply watch the already-existing clock signal present on the 6502's pins. In the original C64, this timing trick was used to allow the [[MOS Technology VIC-II|VIC-II]] to interleave its access to [[main memory]] with that of the 6510.{{efn|Most 6502-based machines of the era used this concept, which is why the 1&nbsp;MHz speed of the CPU is common on machines with 2&nbsp;MHz RAM - The [[Commodore PET|PET]] ran at 1&nbsp;MHz, the [[Apple II]] at 1.02, etc. For comparison, the [[Atari 8-bit computers]] use the explicit pausing solution, which offers higher performance but requires additional circuitry, and later, a custom version of the CPU. The [[BBC Micro]] used interleaving like the C64, but had 4&nbsp;MHz RAM, allowing it to run the CPU and display at 2&nbsp;MHz.}}