Editing Mostek (section)

==World leader in DRAM==
[[File:MOSTEK 4K RAM June 1974.jpg|thumb|Mostek's 4K Dynamic RAM.]]
Mostek co-founder Robert Proebsting invented [[DRAM]] address multiplexing with the MK4096 4096 X 1 bit DRAM introduced in 1973. [[Bus (computing)#Address multiplexing|Address multiplexing]] reduced cost and board space by fitting a 4K DRAM into a 16 pin package, while competitors used a bulky and relatively expensive 22 pin package.<ref>{{cite web|access-date=2024-02-16 |date=2017-06-30 |title=Chip Hall of Fame: Mostek MK4096 4-Kilobit DRAM |publisher=[[IEEE]] |url= https://spectrum.ieee.org/chip-hall-of-fame-mostek-mk4096-4kilobit-dram}}</ref> Competitors derided the Mostek approach as unnecessarily complex, but Proebsting understood the future roadmap for DRAM memories would benefit greatly if only one new pin were needed for every 4X increase in memory size, instead of the two pins per 4X for the evolutionary approach.

Computer manufacturers found address multiplexing to be a compelling feature as they saw that a future 64K DRAM chip would save 8 pins if implemented with address multiplexing and subsequent generations even more. Per pin costs are a major cost driver in integrated circuits, plus the multiplexed approach used less silicon area, which further reduces chip cost. The MK4096 was produced using an NMOS aluminum-gate process with an added interconnect layer of polysilicon (dubbed the SPIN process).<ref>{{cite web|access-date=2024-02-16 |date=1979 |title=Mostek 1979 Memory Data Book And Designer Guide |url=http://www.bitsavers.org/components/mostek/_dataBooks/1979_Mostek_Memory_Data_Book_and_Designers_Guide_Mar79.pdf |page=101}}</ref> The [[fear, uncertainty and doubt]] put up by the competition regarding address multiplexing was dispelled by the actual performance of the MK4096 which proved solid and robust in all types of computer memory designs.

In 1976 Mostek introduced the [[silicon-gate]] MK4027 (an improved version of the metal-gated MK4096), and in 1977 the MK4116 16K double-poly silicon-gate DRAM designed by Paul Schroeder and Robert Proebsting (Schroeder later left Mostek to co-found [[Inmos]]). The MK4116 achieved '''greater than 75% worldwide DRAM market share.''' The MK4027 and MK4116 were reverse-engineered by [[MOSAID]] and successfully cloned by many companies, both USA and overseas-based.

The 64K generation of DRAMs required a transition from 12V & +/−5V to 5V-only operation, in order to free the +12V and −5V pins for use as addresses (the +5V and ground pins were assigned to pins 8 and 16, respectively, rather than the 16-pin TTL DIP standard of pin 8 for ground and pin 16 for +5V). While most competitors took a conservative approach by simply shrinking (scaling) their 64Ks, Mostek undertook a major redesign which incorporated forward-looking features (such as controlled pre-charge current) that were not necessary at the 64K level and delayed entry into the market.

Mostek's DRAM legacy is exemplified in the MK4116, MK4164 and MK41256. "By four" DRAM was a simple adaptation of the MK4116/MK4164/MK41256 technology, utilizing a larger package to accommodate the additional data bits and multiplexing the data in/out pins as well; the basic *RAS, *CAS, *WRITE and [[Bus (computing)#Bus multiplexing|multiplexed address bus]] concept was retained intact.