Editing PowerPC 7xx (section)

=== PowerPC 740/750 ===
[[File:XPC750.jpg|right|thumb|300 MHz Motorola PowerPC 750 processor with off-die L2 cache on the CPU module from a [[Power Mac G3]].]]
The PowerPC 740 and 750 (codename Arthur)<ref name="Gwennap 1997">[[#Gwennap 1997|Gwennap 1997]]</ref> were introduced in late 1997 as an evolutionary replacement for the [[PowerPC 603]]e. Enhancements included a faster [[PowerPC 600#60x bus|60x system bus]] (66&nbsp;MHz), larger L1 caches (32 KB instruction and 32 KB data), a second integer unit, an enhanced floating point unit, and higher core frequency. The 750 had support for an optional 256, 512 or 1024 KB external unified L2 cache. The cache controller and cache tags are on-die. The cache was accessed via a dedicated 64-bit bus.

The 740 and 750 added [[branch predictor|dynamic branch prediction]] and a 64-entry branch target instruction cache (BTIC). Dynamic branch prediction uses the recorded outcome of a branch stored in a 512-entry by 2-bit branch history table (BHT) to predict its outcome. The BTIC caches the first two instructions at a branch target.

The 740/750 models had 6.35 million transistors and were initially manufactured by IBM and Motorola in an aluminium based fabrication process. The die measured 67&nbsp;mm<sup>2</sup> at 0.26&nbsp;μm and it reached speeds of up to 366&nbsp;MHz while consuming 7.3&nbsp;W.

In 1999, IBM fabricated versions in a 0.20&nbsp;μm process with [[copper interconnect]]s, which increased the frequency up to 500&nbsp;MHz and decreased power consumption to 6&nbsp;W and the die size to 40&nbsp;mm<sup>2</sup>.

The 740 slightly outperformed the [[Pentium II]] while consuming far less power and with a smaller die. The off-die L2 cache of the 750 increased performance by approximately 30% in most situations. The design was so successful that it quickly surpassed the [[PowerPC 604e]] in integer performance, causing a planned 604 successor to be scrapped.

The PowerPC 740 is completely pin compatible with the older 603, allowing upgrades to the PowerBook 1400, 2400, and even a prototype PowerBook 500/G3. The 750 with its L2 cache bus required more pins and thus a different package, a 360-pin [[ball grid array]] (BGA).

The PowerPC 750 was used in many computers from Apple, including the original [[iMac]].

==== RAD750 ====
{{Main|RAD750}}
The RAD750 is a [[radiation hardening|radiation-hardened]] processor, based on the PowerPC 750. It is intended for use in high [[ionizing radiation|radiation]] environments such as experienced on board [[satellite]]s and other [[spacecraft]]. The RAD750 was released for purchase in 2001. The [[Mars Science Laboratory]] ([[Curiosity (rover)|''Curiosity'']]), [[Mars Reconnaissance Orbiter]], [[Mars 2020]] ([[Perseverance (rover)|''Perseverance'']]) and [[James Webb Space Telescope]] spacecraft have a RAD750 on board.<ref>{{cite web|title=Mars Science Laboratory Launch Press Kit|url=http://www.jpl.nasa.gov/news/press_kits/MSLLaunch.pdf|publisher=NASA/JPL}}</ref><ref>{{Cite web|last=McComas|first=David|title=Lessons from 30 Years of Flight Software|url=https://ntrs.nasa.gov/api/citations/20150019915/downloads/20150019915.pdf|website=NTRS - NASA Technical Reports Server}}</ref>

The processor has 10.4 million transistors, is manufactured by [[BAE Systems]] using either 250 or 150&nbsp;nm process and has a die area of 130&nbsp;mm<sup>2</sup>. It operates at 110 to 200&nbsp;MHz. The CPU itself can withstand 200,000 to 1,000,000 [[Rad (unit)|Rad]]s and temperature ranges between −55 and 125&nbsp;°C.
The RAD750 packaging and logic functions has a price tag in excess of [[United States dollar|US$]]200,000 {{citation needed|date=December 2022}}: the high price is mainly due to radiation hardening revisions to the PowerPC 750 architecture and manufacturing, stringent quality control requirements, and extended testing of each processor chip manufactured.