Editing Register-transfer level (section)

==RTL in the circuit design cycle==
RTL is used in the [[digital logic|logic design]] phase of the [[integrated circuit design]] cycle.

An RTL description is usually converted to a [[netlist|gate-level description]] of the circuit by a [[logic synthesis]] [[Software tool|tool]]. The synthesis results are then used by [[Placement (EDA)|placement]] and [[Routing (EDA)|routing]] tools to create a physical [[integrated circuit|layout]].

[[Logic simulation]] tools may use a design's RTL description to verify its correctness.