Editing Register allocation (section)

=== Principle ===
{{See also|Computer data storage|Memory hierarchy}}
<!-- please change this to wiki table and add numbers for 32-bit versions of SPARC and MIPS -->

<!-- {| class="wikitable" style="text-align:center; width:30%; float: right; margin=1em; border-spacing: 2px" -->
 {| class="wikitable floatright"
 |+ Different number of general-purpose registers in the most common architectures
 |-
 ! Architecture
 ! scope="col" | 32 bit
 ! scope="col" | 64 bit
 |-
 ! scope="row" | ARM
 | 15
 | 31
 |-
 ! scope="row" | Intel x86
 | 8
 | 16
 |-
 ! scope="row" | MIPS
 | 32
 | 32
 |-
 ! scope="row" | POWER/PowerPC
 | 32
 | 32
 |-
 ! scope="row" | RISC-V
 | 16/32
 | 32
 |-
 ! scope="row" | SPARC
 | 31
 | 31
 |-
 |}

<!-- I assume the lack of a 32-bit entry for the "SPARC" row in the table indicates that the architecture in question only supports 64-bit -->

In many [[programming language]]s, the programmer may use any number of [[Variable (computer science)|variables]]. The computer can quickly read and write [[Processor register|registers]] in the [[Central processing unit|CPU]], so the [[computer program]] runs faster when more variables can be in the CPU's registers.{{sfn|Ditzel|McLellan|1982|p=48}} Also, sometimes code accessing registers is more compact, so the code is smaller, and can be fetched faster if it uses registers rather than memory. However, the number of registers is limited. Therefore, when the [[Compiler (computing)|compiler]] is translating code to machine-language, it must decide how to allocate variables to the limited number of registers in the CPU.{{sfn|Runeson|Nyström|2003|p=242}}{{sfn|Eisl|Grimmer|Simon|Würthinger|2016|p=14:1}}

Not all variables are [[liveness analysis|in use]] (or "live") at the same time, so, over the lifetime of a program, a given register may be used to hold different variables. However, two variables in use at the ''same'' time cannot be assigned to the same register without corrupting one of the variables. If there are not enough registers to hold all the variables, some variables may be moved to and from [[random access memory|RAM]]. This process is called "spilling" the registers.{{sfn|Chaitin|Auslander|Chandra|Cocke|1981|p=47}} Over the lifetime of a program, a variable can be both spilled and stored in registers: this variable is then considered as "split".{{sfn|Eisl|Grimmer|Simon|Würthinger|2016|p=1}} Accessing RAM is significantly slower than accessing registers <ref>{{cite web |url=https://blog.morizyun.com/computer-science/basic-latency-comparison-numbers.html |title=Latency Comparison Numbers in computer/network |publisher=blog.morizyun.com |date=2018-01-06 |access-date=8 January 2019}}</ref> and so a compiled program runs slower. Therefore, an optimizing compiler aims to assign as many variables to registers as possible. A high "[[Register pressure]]" is a technical term that means that more spills and reloads are needed; it is defined by Braun et al. as "the number of simultaneously live variables at an instruction".{{sfn|Braun|Hack|2009|p=174}}

In addition, some computer designs [[Cache (computing)|cache]] frequently-accessed registers. So, programs can be further optimized by assigning the same register to a source and destination of a <code>move</code> instruction whenever possible. This is especially important if the compiler is using an [[intermediate representation]] such as [[Static single assignment form|static single-assignment form]] (SSA). In particular, when SSA is not fully optimized it can artificially generate additional <code>move</code> instructions.