Editing Silicon on insulator (section)

==SOI transistors==
{{MOS|section|date=August 2023}}
An SOI MOSFET is a [[metal–oxide–semiconductor field-effect transistor]] (MOSFET) device in which a [[semiconductor]] layer such as silicon or [[germanium]] is formed on an insulator layer which may be a buried oxide (BOX) layer formed in a semiconductor substrate.<ref>{{cite patent |first= |last= |title=SOI wafers with 30-100 Ang. Buried OX created by wafer bonding using 30-100 Ang. thin oxide as bonding layer |country=US |number=6835633 |url=}}</ref><ref>{{cite patent |first= |last= |title=Ultra-thin body super-steep retrograde well (SSRW) FET devices |country=US |number=7002214 |url=}}</ref><ref>{{cite journal |author=Yang-Kyu Choi |last2=Asano |first2=K. |last3=Lindert |first3=N. |last4=Subramanian |first4=V. |author5=Tsu-Jae King |last6=Bokor |first6=J. |author7=Chenming Hu |title=Ultrathin-body SOI MOSFET for deep-sub-tenth micron era |journal=IEEE Electron Device Letters |volume=21 |issue=5 |pages=254–5 |date=May 2000 |doi=10.1109/IEDM.1999.824298 |s2cid=43561939 |url=http://www-device.eecs.berkeley.edu/~viveks/Papers/254EDL21.pdf}}</ref> SOI MOSFET devices are adapted for use by the computer industry.{{Citation needed|date=October 2008}} The buried oxide layer can be used in [[static random-access memory|SRAM]] designs.<ref>{{cite patent |first= |last= |title=Vertical MOSFET SRAM cell |country=US |number=7138685 |url=}} describes SOI buried oxide (BOX) structures and methods for implementing enhanced SOI BOX structures</ref> There are two types of SOI devices: PDSOI (partially depleted SOI) and FDSOI (fully depleted SOI) MOSFETs. For an n-type PDSOI MOSFET the sandwiched n-type film between the gate oxide (GOX) and buried oxide (BOX) is large, so the depletion region can't cover the whole n region. So to some extent PDSOI behaves like [[bulk MOSFET]]. Obviously there are some advantages over the bulk MOSFETs. The film is very thin in FDSOI devices so that the depletion region covers the whole channel region. In FDSOI the front gate (GOX) supports fewer depletion charges than the bulk so an increase in inversion charges occurs resulting in higher switching speeds. The limitation of the depletion charge by the BOX induces a suppression of the depletion capacitance and therefore a substantial reduction of the subthreshold swing allowing FD SOI MOSFETs to work at lower gate bias resulting in lower power operation. The [[Subthreshold slope|subthreshold swing]] can reach the minimum theoretical value for MOSFET at 300K, which is 60mV/decade. This ideal value was first demonstrated using numerical simulation.<ref>{{cite thesis |first=F. |last=Balestra |title=Characterization and Simulation of SOI MOSFETs with Back Potential Control |date=1985 |type=PhD |publisher=INP-Grenoble |url=}}</ref><ref>{{cite book |first=F. |last=Balestra |chapter=1.5 Challenges to Ultralow-Power Semiconductor Device Operation |title=Future Trends in Microelectronics—Journey into the unknown |editor-first=S. |editor-last=Lury |editor2-first=J. |editor2-last=Xu |editor3-first=A. |editor3-last=Zaslavsky  |publisher=Wiley |date=2016 |doi=10.1002/9781119069225.ch1-5  |isbn=978-1-119-06922-5 |chapter-url={{GBurl|FPnoDAAAQBAJ|p=69}} |pages=69–81}}</ref> Other drawbacks in bulk MOSFETs, like threshold voltage roll off, etc. are reduced in FDSOI since the source and drain electric fields can't interfere due to the BOX. The main problem in PDSOI is the "[[floating body effect]] (FBE)" since the film is not connected to any of the supplies.{{Citation needed|date=June 2018}}