Editing SystemC (section)

=== Compared to HDLs ===
SystemC has semantic similarities to [[VHDL]] and [[Verilog]], but may be said to have a syntactical overhead compared to these when used as a [[hardware description language]]. On the other hand, it offers a greater range of expression, similar to [[Object-oriented programming|object-oriented design partitioning]] and template classes. Although strictly a C++ class library, SystemC is sometimes viewed as being a language in its own right. Source code can be compiled with the SystemC library (which includes a simulation kernel) to give an executable. The performance of the OSCI open-source implementation is typically worse than commercial VHDL/Verilog simulators when used for [[register transfer level]] simulation.{{Citation needed|date=December 2021}}