Editing Transition-minimized differential signaling (section)

==Coding==
The method is a form of [[8b/10b encoding]] but using a code-set that differs from the original [[IBM]] form. A two-stage process converts an input of 8 bits into a 10 bit code with particular desirable properties. In the first stage, the first bit is untransformed and each subsequent [[bit]] is either [[Exclusive or|XOR]] or [[Exclusive nor|XNOR]] transformed against the previous bit. The encoder chooses between XOR and XNOR by determining which will result in the fewest transitions; the ninth bit encodes which operation was used. In the second stage, the first eight bits are optionally inverted to even out the balance of ones and zeros and therefore the sustained average [[Direct current|DC]] level; the tenth bit encodes whether this inversion took place.

The 10-bit TMDS symbol can represent either an 8-bit data value during normal data transmission, or 2 bits of control signals during screen blanking. Of the 1,024 possible combinations of the 10 transmitted bits:
* 460 combinations are used to represent an 8-bit data value, as most of the 256 possible values have two encoded variants (some values have only one),
* 4 combinations are used to represent 2 bits of control signals (C0 and C1 in the table below); unlike the data symbols these have such properties that they can be reliably recognized even if sync is lost and are therefore also used for synchronizing the decoder,
* 2 combinations are used as a guard band before HDMI data,
* 558 remaining combinations are reserved and forbidden.

Control data is encoded using the values in the table below. Control data characters are designed to have a large number (7) of transitions to help the receiver synchronize its clock with the transmitter clock.

{| class="wikitable" style="text-align:center;"
|+ Control data encoding
! colspan="2" | Input control bit || Output<br />codeword<br />
|-
! C0 || C1 || 0 ... 9
|-
| 0 || 0 || 0010101011
|-
| 0 || 1 || 0010101010
|-
| 1 || 0 || 1101010100
|-
| 1 || 1 || 1101010101
|}

On channel 0 the C0 and C1 bits encode the [[Analog_television#Horizontal_synchronization|horizontal synchronization]] (HSync) and [[Analog_television#Vertical_synchronization|vertical synchronization]] (VSync) signals. On the other channels they encode the CTL0 through CTL3 signals which are unused by DVI but in the case of HDMI, are used as a preamble indicating the type of data about to be transferred (Video Data or Data Island), the [[High-bandwidth Digital Content Protection|HDCP]] status and so on.