Editing MOSFET (section)

==== Dual-type (CMOS) ====
This "complementary" or CMOS type of switch uses one P-MOS and one N-MOS FET to counteract the limitations of the single-type switch. The FETs have their drains and sources connected in parallel, the body of the P-MOS is connected to the high potential (''V''<sub>DD</sub>) and the body of the N-MOS is connected to the low potential (''gnd''). To turn the switch on, the gate of the P-MOS is driven to the low potential and the gate of the N-MOS is driven to the high potential. For voltages between ''V''<sub>DD</sub> − ''V''<sub>tn</sub> and ''gnd'' − ''V''<sub>tp</sub>, both FETs conduct the signal; for voltages less than ''gnd'' − ''V''<sub>tp</sub>, the N-MOS conducts alone; and for voltages greater than ''V''<sub>DD</sub> − ''V''<sub>tn</sub>, the P-MOS conducts alone.

The voltage limits for this switch are the gate-source, gate-drain and source-drain voltage limits for both FETs. Also, the P-MOS is typically two to three times wider than the N-MOS, so the switch will be balanced for speed in the two directions.

[[Three-state logic|Tri-state circuitry]] sometimes incorporates a CMOS MOSFET switch on its output to provide for a low-ohmic, full-range output when on, and a high-ohmic, mid-level signal when off.