Editing Register allocation (section)

== Sources ==
{{refbegin|35em}}
* {{cite journal|last1=Ahn|first1=Minwook|last2=Paek|first2=Yunheung|title=Register coalescing techniques for heterogeneous register architecture with copy sifting|journal=ACM Transactions on Embedded Computing Systems|volume=8|issue=2|year=2009|pages=1–37|issn=1539-9087|doi=10.1145/1457255.1457263 |citeseerx=10.1.1.615.5767|s2cid=14143277}}
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* {{cite book|last1=Appel|first1=Andrew W.|title=Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation - PLDI '01|last2=George|first2=Lal|chapter=Optimal spilling for CISC machines with few registers|year=2001|pages=243–253|doi=10.1145/378795.378854  |isbn=978-1581134148|citeseerx=10.1.1.37.8978|s2cid=1380545}}
* {{cite book|last1=Barik|first1=Rajkishore|title=Languages and Compilers for Parallel Computing |last2=Grothoff|first2=Christian|last3=Gupta|first3=Rahul|last4=Pandit|first4=Vinayaka|last5=Udupa |first5=Raghavendra |chapter=Optimal Bitwise Register Allocation Using Integer Linear Programming|volume=4382|year=2007|pages=267–282|doi=10.1007/978-3-540-72521-3_20 |series=Lecture Notes in Computer Science|isbn=978-3-540-72520-6 |citeseerx=10.1.1.75.6911}}
* {{cite book|last1=Bergner|first1=Peter|title=Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation - PLDI '97 |last2=Dahl|first2=Peter|last3=Engebretsen |first3=David|last4=O'Keefe |first4=Matthew|chapter=Spill code minimization via interference region spilling|year=1997|pages=287–295|doi=10.1145/258915.258941|isbn=978-0897919074|s2cid=16952747}}
* {{cite book|last1=Blackburn|first1=Stephen M.|title=Proceedings of the 21st annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications - OOPSLA '06|last2=Guyer|first2=Samuel Z. |last3=Hirzel |first3=Martin|last4=Hosking|first4=Antony|last5=Jump|first5=Maria|last6=Lee|first6=Han |last7=Eliot|first7=J.|last8=Moss|first8=B.|last9=Phansalkar|first9=Aashish|last10=Stefanović|first10=Darko |last11=VanDrunen|first11=Thomas |last12=Garner|first12=Robin|last13=von Dincklage|first13=Daniel |last14=Wiedermann|first14=Ben|last15=Hoffmann|first15=Chris|last16=Khang|first16=Asjad M.|last17=McKinley |first17=Kathryn S.|last18=Bentzur|first18=Rotem |last19=Diwan|first19=Amer|last20=Feinberg|first20=Daniel |last21=Frampton|first21=Daniel|chapter=The DaCapo benchmarks|year=2006|pages=169|isbn=978-1595933485 |doi=10.1145/1167473.1167488|hdl=1885/33723 |s2cid=9255051}}
* {{cite journal|last1=Book|first1=Ronald V.|title=Karp Richard M.. Reducibility among combinatorial problems. Complexity of computer computations, Proceedings of a Symposium on the Complexity of Computer Computations, held March 20-22, 1972, at the IBM Thomas J. Watson Center, Yorktown Heights, New York, edited by Miller Raymond E. and Thatcher James W., Plenum Press, New York and London 1972, pp. 85–103. |journal=The Journal of Symbolic Logic |volume=40 |issue=4|date=December 1975|pages=618–619|issn=0022-4812 |doi=10.2307/2271828 |jstor=2271828}}
* {{cite book|last1=Bouchez|first1=Florent|last2=Darte|first2=Alain|last3=Rastello|first3=Fabrice |title=Register allocation: what does the NP-Completeness proof of Chaitin et al. really prove?|volume=4382|year=2006|pages=2–14 |doi=10.1007/978-3-540-72521-3_21 |chapter=Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How|series=Lecture Notes in Computer Science|isbn=978-3-540-72520-6}}
* {{cite book|last1=Bouchez|first1=Florent|title=International Symposium on Code Generation and Optimization (CGO'07)|last2=Darte|first2=Alain|last3=Rastello|first3=Fabrice|chapter=On the Complexity of Register Coalescing |year=2007a|pages=102–114|doi=10.1109/CGO.2007.26 |isbn=978-0-7695-2764-2|citeseerx=10.1.1.101.6801|s2cid=7683867}}
* {{cite journal|last1=Bouchez|first1=Florent|last2=Darte|first2=Alain|last3=Rastello|first3=Fabrice |title=On the complexity of spill everywhere under SSA form|journal=ACM SIGPLAN Notices|volume=42|issue=7 |year=2007b|pages=103–114 |issn=0362-1340|doi=10.1145/1273444.1254782  |arxiv=0710.3642}}
* {{cite book|last1=Braun|first1=Matthias|title=Compiler Construction|last2=Hack|first2=Sebastian |chapter=Register Spilling and Live-Range Splitting for SSA-Form Programs|volume=5501|year=2009|pages=174–189|issn=0302-9743 |doi=10.1007/978-3-642-00722-4_13  |series=Lecture Notes in Computer Science|isbn=978-3-642-00721-7|citeseerx=10.1.1.219.5318}}
* {{cite journal|last1=Briggs|first1=Preston|last2=Cooper|first2=Keith D.|last3=Torczon|first3=Linda|title=Rematerialization|journal=ACM SIGPLAN Notices|volume=27|issue=7|year=1992|pages=311–321|issn=0362-1340 |doi=10.1145/143103.143143 }}
* {{cite journal|last1=Briggs|first1=Preston|last2=Cooper|first2=Keith D.|last3=Torczon|first3=Linda |title=Improvements to graph coloring register allocation|journal=ACM Transactions on Programming Languages and Systems|volume=16|issue=3|year=1994|pages=428–455|issn=0164-0925|doi=10.1145/177492.177575  |citeseerx=10.1.1.23.253|s2cid=6571479}}
* {{cite book|last1=Cavazos|first1=John|title=Compiler Construction|last2=Moss|first2=J. Eliot B. |last3=O’Boyle|first3=Michael F. P.|chapter=Hybrid Optimizations: Which Optimization Algorithm to Use?|volume=3923|year=2006 |pages=124–138|issn=0302-9743|doi=10.1007/11688839_12  |series=Lecture Notes in Computer Science|isbn=978-3-540-33050-9}}
* {{cite journal|last1=Chaitin|first1=Gregory J.|last2=Auslander|first2=Marc A.|last3=Chandra |first3=Ashok K.|last4=Cocke|first4=John|last5=Hopkins|first5=Martin E.|last6=Markstein|first6=Peter W.|title=Register allocation via coloring|journal=Computer Languages|volume=6|issue=1|year=1981|pages=47–57|issn=0096-0551|doi=10.1016/0096-0551(81)90048-5 }}
* {{cite book|last1=Chaitin|first1=G. J.|title=Proceedings of the 1982 SIGPLAN symposium on Compiler construction - SIGPLAN '82|chapter=Register allocation & spilling via graph coloring|year=1982|pages=98–101 |doi=10.1145/800230.806984 |isbn=978-0897910743|s2cid=16872867}}
* {{cite book|last1=Chen|first1=Wei-Yu|title=Proceedings of the 2018 International Symposium on Code Generation and Optimization - CGO 2018|last2=Lueh|first2=Guei-Yuan|last3=Ashar|first3=Pratik|last4=Chen |first4=Kaiyu|last5=Cheng |first5=Buqi|chapter=Register allocation for Intel processor graphics |year=2018|pages=352–364|doi=10.1145/3168806 |isbn=9781450356176|s2cid=3367270}}
* {{cite book|last1=Cohen|first1=Albert|title=Proceedings of the 47th Design Automation Conference on - DAC '10|last2=Rohou|first2=Erven|chapter=Processor virtualization and split compilation for heterogeneous multicore embedded systems|year=2010|pages=102|doi=10.1145/1837274.1837303  |isbn=9781450300025|citeseerx=10.1.1.470.9701|s2cid=14314078}}
* {{cite book|last1=Colombet|first1=Quentin|title=Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems - CASES '11|last2=Brandner|first2=Florian |last3=Darte|first3=Alain |chapter=Studying optimal spilling in the light of SSA|year=2011|pages=25|doi=10.1145/2038698.2038706 |isbn=9781450307130|s2cid=8296742}}
* {{cite book|last1=Diouf|first1=Boubacar|title=High Performance Embedded Architectures and Compilers |last2=Cohen|first2=Albert|last3=Rastello|first3=Fabrice|last4=Cavazos|first4=John|chapter=Split Register Allocation: Linear Complexity Without the Performance Penalty|volume=5952|year=2010|pages=66–80|issn=0302-9743|doi=10.1007/978-3-642-11515-8_7  |series=Lecture Notes in Computer Science|isbn=978-3-642-11514-1|citeseerx=10.1.1.229.3988}}
* {{cite book|last1=Ditzel|first1=David R.|title=Proceedings of the first international symposium on Architectural support for programming languages and operating systems - ASPLOS-I|last2=McLellan|first2=H. R.|chapter=Register allocation for free|year=1982|pages=48–56|doi=10.1145/800050.801825  |isbn=978-0897910668|s2cid=2812379}}
* {{cite book|last1=Eisl|first1=Josef|title=Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools - PPPJ '16 |last2=Grimmer|first2=Matthias|last3=Simon|first3=Doug|last4=Würthinger|first4=Thomas|last5=Mössenböck |first5=Hanspeter|chapter=Trace-based Register Allocation in a JIT Compiler|year=2016|pages=1–11 |doi=10.1145/2972206.2972211|isbn=9781450341356|s2cid=31845919|url=http://epub.jku.at/doi/10.1145/2972206.2972211}}
* {{cite book|last1=Eisl|first1=Josef|title=Proceedings of the 14th International Conference on Managed Languages and Runtimes - Man ''Lang'' 2017|last2=Marr|first2=Stefan|last3=Würthinger|first3=Thomas |last4=Mössenböck |first4=Hanspeter|chapter=Trace Register Allocation Policies|year=2017|pages=92–104 |doi=10.1145/3132190.3132209|isbn=9781450353403|s2cid=1195601|url=http://epub.jku.at/doi/10.1145/3132190.3132209|chapter-url=http://kar.kent.ac.uk/63807/1/manlang17-eisl-et-al-trace-register-allocation-policies.pdf}}
* {{cite book|last1=Eisl|first1=Josef|title=Proceedings of the 15th International Conference on Managed Languages & Runtimes - Man ''Lang'' '18|last2=Leopoldseder|first2=David|last3=Mössenböck|first3=Hanspeter |chapter=Parallel trace register allocation|year=2018|pages=1–7|doi=10.1145/3237009.3237010  |isbn=9781450364249|s2cid=52137887|url=https://resolver.obvsg.at/urn:nbn:at:at-ubl:3-271}}
* {{cite conference | last1 = Koes | first1 = David Ryan | last2 = Goldstein | first2 = Seth Copen | title = Register Allocation Deconstructed | book-title = Proceedings of the 12th International Workshop on Software and Compilers for Embedded Systems | series = SCOPES '09 | year = 2009 | isbn = 978-1-60558-696-0 | location = Nice, France | pages = 21–30 | url = http://dl.acm.org/citation.cfm?id=1543820.1543824 | publisher = ACM | publication-place = New York, NY, USA  }}
* {{cite conference | last1 = Farach | first1 = Martin | last2 = Liberatore | first2 = Vincenzo | title = On Local Register Allocation | book-title = Proceedings of the Ninth Annual ACM-SIAM Symposium on Discrete Algorithms | series = SODA '98 | year = 1998 | isbn = 0-89871-410-9 | location = San Francisco, California, USA | pages = [https://archive.org/details/proceedingsofnin0000acms/page/564 564–573] | url = https://archive.org/details/proceedingsofnin0000acms/page/564 | publisher = Society for Industrial and Applied Mathematics | publication-place = Philadelphia, PA, USA }}
* {{citation|first1=P.|last1=Flajolet|author1-link=Philippe Flajolet|first2=J. C.|last2=Raoult|first3=J. |last3=Vuillemin|author3-link=Jean Vuillemin |title=The number of registers required for evaluating arithmetic expressions |journal=Theoretical Computer Science|volume=9|issue=1|year=1979|pages=99–125 |doi=10.1016/0304-3975(79)90009-4|doi-access=free}}
* {{cite journal|last1=George|first1=Lal|last2=Appel|first2=Andrew W.|title=Iterated register coalescing |journal=ACM Transactions on Programming Languages and Systems|volume=18|issue=3|year=1996|pages=300–324 |issn=0164-0925 |doi=10.1145/229542.229546  |s2cid=12281734|doi-access=free}}
* {{cite journal|last1=Horwitz|first1=L. P.|last2=Karp|first2=R. M.|last3=Miller|first3=R. E. |last4=Winograd|first4=S.|title=Index Register Allocation|journal=Journal of the ACM|volume=13|issue=1 |year=1966|pages=43–61|issn=0004-5411|doi=10.1145/321312.321317 |s2cid=14560597|doi-access=free}}
* {{cite book|last1=Johansson|first1=Erik|title=Practical Aspects of Declarative Languages|last2=Sagonas |first2=Konstantinos|chapter=Linear Scan Register Allocation in a High-Performance Erlang Compiler|volume=2257 |year=2002 |pages=101–119|issn=0302-9743|doi=10.1007/3-540-45587-6_8  |series=Lecture Notes in Computer Science|isbn=978-3-540-43092-6}}
* {{cite book|last1=Kurdahi|first1=F. J.|title=24th ACM/IEEE conference proceedings on Design automation conference - DAC '87|last2=Parker|first2=A. C.|author2-link=Alice C. Parker|chapter=REAL: a program for REgister ALlocation |year=1987|pages=210–215|doi=10.1145/37888.37920  |isbn=978-0818607813|s2cid=17598675}}
* {{cite book|last1=Mössenböck|first1=Hanspeter|title=Compiler Construction|last2=Pfeiffer|first2=Michael |chapter=Linear Scan Register Allocation in the Context of SSA Form and Register Constraints|volume=2304 |year=2002 |pages=229–246|issn=0302-9743|doi=10.1007/3-540-45937-5_17|series=Lecture Notes in Computer Science|isbn=978-3-540-43369-9}}
* {{cite journal|last1=Nickerson|first1=Brian R.|title=Graph coloring register allocation for processors with multi-register operands|journal=ACM SIGPLAN Notices|volume=25|issue=6|year=1990|pages=40–52|issn=0362-1340 |doi=10.1145/93548.93552}}
* {{ cite conference|last1=Paleczny|first1=Michael|last2=Vick|first2=Christopher|last3=Click|first3=Cliff|title=The Java HotSpot Server Compiler|year = 2001|location= Monterey, California, USA|book-title = Proceedings of the Java Virtual Machine Research and Technology Symposium (JVM01)|pages = 1–12|citeseerx=10.1.1.106.1919 }}
* {{cite journal|last1=Park|first1=Jinpyo|last2=Moon|first2=Soo-Mook|title=Optimistic register coalescing |journal=ACM Transactions on Programming Languages and Systems|volume=26|issue=4|year=2004|pages=735–765 |issn=0164-0925 |doi=10.1145/1011508.1011512 |citeseerx=10.1.1.33.9438|s2cid=15969885}}
* {{cite journal|last1=Poletto|first1=Massimiliano|last2=Sarkar|first2=Vivek|title=Linear scan register allocation|journal=ACM Transactions on Programming Languages and Systems|volume=21|issue=5|year=1999 |pages=895–913|issn=0164-0925|doi=10.1145/330249.330250|citeseerx=10.1.1.27.2462|s2cid=18180752}}
* {{cite arXiv |last=Rogers |first=Ian |date=2020 |title=Efficient global register allocation |class=cs.PL |eprint=2011.05608}}
* {{cite book|last1=Runeson|first1=Johan|title=Software and Compilers for Embedded Systems |last2=Nyström|first2=Sven-Olof|chapter=Retargetable Graph-Coloring Register Allocation for Irregular Architectures |volume=2826|year=2003 |pages=240–254|issn=0302-9743|doi=10.1007/978-3-540-39920-9_17 |series=Lecture Notes in Computer Science|isbn=978-3-540-20145-8|citeseerx=10.1.1.6.6186}}
* {{cite journal|last1=Smith|first1=Michael D.|last2=Ramsey|first2=Norman|last3=Holloway|first3=Glenn |title=A generalized algorithm for graph-coloring register allocation|journal=ACM SIGPLAN Notices|volume=39 |issue=6|year=2004 |pages=277|issn=0362-1340|doi=10.1145/996893.996875|citeseerx=10.1.1.71.9532}}
* {{cite journal|last1=Traub|first1=Omri|last2=Holloway|first2=Glenn|last3=Smith|first3=Michael D. |title=Quality and speed in linear-scan register allocation|journal=ACM SIGPLAN Notices|volume=33|issue=5 |year=1998|pages=142–151 |issn=0362-1340|doi=10.1145/277652.277714|citeseerx=10.1.1.52.8730}}
* {{cite book|last1=Wimmer|first1=Christian|title=Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments - VEE '05|last2=Mössenböck|first2=Hanspeter|chapter=Optimized interval splitting in a linear scan register allocator|year=2005|pages=132|doi=10.1145/1064979.1064998 |isbn=978-1595930477|citeseerx=10.1.1.394.4054|s2cid=494490}}
* {{cite book|last1=Wimmer|first1=Christian|title=Proceedings of the 8th annual IEEE/ ACM international symposium on Code generation and optimization - CGO '10|last2=Franz|first2=Michael|chapter=Linear scan register allocation on SSA form|year=2010|pages=170|doi=10.1145/1772954.1772979 |isbn=9781605586359 |citeseerx=10.1.1.162.2590|s2cid=1820765}}
{{refend}}