Editing Static random-access memory (section)

===Writing===
The write cycle begins by applying the value to be written to the bit lines. To write a 0, a 0 is applied to the bit lines, such as setting <span style="text-decoration: overline;">BL</span> to 1 and BL to 0. This is similar to applying a reset pulse to an [[Latch (electronic)|SR-latch]], which causes the flip flop to change state. A '''1''' is written by inverting the values of the bit lines. WL is then asserted and the value that is to be stored is latched in. This works because the bit line input-drivers are designed to be much stronger than the relatively weak transistors in the cell itself so they can easily override the previous state of the cross-coupled inverters. In practice, access NMOS transistors M<sub>5</sub> and M<sub>6</sub> have to be stronger than either bottom NMOS (M<sub>1</sub>, M<sub>3</sub>) or top PMOS (M<sub>2</sub>, M<sub>4</sub>) transistors. This is easily obtained as PMOS transistors are much weaker than NMOS when same sized. Consequently, when one transistor pair (e.g.  M<sub>3</sub> and M<sub>4</sub>) is only slightly overridden by the write process, the opposite transistors pair (M<sub>1</sub> and M<sub>2</sub>) gate voltage is also changed. This means that the M<sub>1</sub> and M<sub>2</sub> transistors can be easier overridden, and so on. Thus, cross-coupled inverters magnify the writing process.