Editing Fat binary (section)

=== Heterogeneous computing===
{{anchor|EXOCHI}}Since 2007, some specialized compilers for [[heterogeneous computing|heterogeneous platform]]s produce code files for [[parallel computing|parallel execution]] on multiple types of processors, i.e. the CHI ([[C (programming language)|C]] for Heterogeneous Integration) compiler from the [[Intel]] EXOCHI (Exoskeleton Sequencer) development suite extends the [[OpenMP]] [[directive (programming)|pragma]] concept for [[multithreading (software)|multithreading]] to produce fat binaries containing code sections for different [[instruction set architecture]]s (ISAs) from which the [[runtime system|runtime]] loader can dynamically initiate the parallel execution on multiple available CPU and [[GPU]] cores in a heterogeneous system environment.<ref name="Collins-Chinya-Jiang-Tian-Girkar-Yang-Lueh-Wang_2007"/><ref name="Wang-Collins-Chinya-Jiang-Tian-Girkar-Pearce-Lueh-Yakoushkin-Wang_2007"/>

{{anchor|cubin|SASS|GPGPU-Sim}}Introduced in 2006, [[Nvidia]]'s parallel computing platform [[CUDA]] (Compute Unified Device Architecture) is a software to enable general-purpose computing on GPUs ([[GPGPU]]). Its [[LLVM]]-based compiler [[NVCC (compiler)|NVCC]] can create [[Executable and Linkable Format|ELF]]-based fat binaries containing so called [[Parallel Thread Execution|PTX]] virtual [[assembly language|assembly]] (as text) which the CUDA runtime driver can later [[just-in-time compilation|just-in-time compile]] into some SASS (Streaming Assembler<!-- sometimes incorrectly given as: Shader Assembly -->) binary executable code for the actually present target GPU. The executables can also include so called ''CUDA binaries'' (aka ''cubin'' files) containing dedicated executable code sections for one or more specific GPU architectures from which the CUDA runtime can choose from at load-time.<ref name="Nvidia_2004"/><ref name="Harris_2014"/><ref name="CUDA_2014"/><ref name="CUDA_2016"/><ref name="CUDA_2022"/><ref name="Braun-Fröning_2019"/> Fat binaries are also supported by {{ill|GPGPU-Sim|de}}, a GPU [[microarchitecture simulation|simulator]] introduced in 2007 as well.<ref name="Fung-Sham-Yuan-Aamodt_2007"/><ref name="Bakhoda-Yuan-Fung-Wong-Aamodt_2009"/>

{{anchor|Multi2Sim}}Multi2Sim (M2S)<!-- v1 (2007) for MIPS, v2 (2008) for x86, v3 (2011) x86+Evergreen, v4 (2012) x86 + MIPS-32 + ARM, Evergreen, v5 -->, an [[OpenCL]] heterogeneous system simulator framework (originally only for either [[MIPS architecture|MIPS]] or x86 CPUs, but later extended to also support [[ARM architecture|ARM]] CPUs and GPUs like the [[Advanced Micro Devices|AMD]]/[[ATI Technologies|ATI]] [[AMD Evergreen|Evergreen]] & [[AMD Southern Islands|Southern Islands]] as well as [[Nvidia Fermi]] & [[Nvidia Kepler|Kepler]] families)<ref name="Multi2Sim_2013"/> supports ELF-based fat binaries as well.<ref name="Ubal-Jang_Mistry_Schaa_Kaeli_2012"/><ref name="Multi2Sim_2013"/>