Editing Flash memory (section)

==Limitations==

===Block erasure===
One limitation of flash memory is that it can be erased only a block at a time. This generally sets all bits in the block to 1. Starting with a freshly erased block, any location within that block can be programmed. However, once a bit has been set to 0, only by erasing the entire block can it be changed back to 1. In other words, flash memory (specifically NOR&nbsp;flash) offers random-access read and programming operations but does not offer arbitrary random-access rewrite or erase operations. A location can, however, be rewritten as long as the new value's 0 bits are a superset of the over-written values. For example, a [[nibble]] value may be erased to 1111, then written as 1110. Successive writes to that nibble can change it to 1010, then 0010, and finally 0000. Essentially, erasure sets all bits to 1, and programming can only clear bits to 0.<ref>
[http://ww1.microchip.com/downloads/en/AppNotes/doc2546.pdf "AVR105: Power Efficient High Endurance Parameter Storage in Flash Memory"].
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Some file systems designed for flash devices make use of this rewrite capability, for example [[YAFFS|YAFFS1]], to represent sector metadata. Other flash file systems, such as [[YAFFS|YAFFS2]], never make use of this "rewrite" capability – they do a lot of extra work to meet a "write once rule".

Although data structures in flash memory cannot be updated in completely general ways, this allows members to be "removed" by marking them as invalid. This technique may need to be modified for [[multi-level cell]] devices, where one memory cell holds more than one bit.

Common flash devices such as [[USB flash drive]]s and memory cards provide only a block-level interface, or [[flash translation layer]] (FTL), which writes to a different cell each time to wear-level the device. This prevents incremental writing within a block; however, it does help the device from being prematurely worn out by intensive write patterns.

===Data retention===
[[File:Micron_45_nm_NOR_Flash_Data_Retention.png|thumb|right|300px|45nm NOR flash memory example of data retention varying with temperatures]]
Data stored on flash cells is steadily lost due to electron detrapping{{Definition needed|data detrapping is not a familiar concept to the average wikipedia reader.|date=December 2022}}. The rate of loss increases exponentially as the [[absolute temperature]] increases. For example: For a 45&nbsp;nm NOR flash, at 1000 hours, the threshold voltage (Vt) loss at 25°C is about half that at 90°C.<ref>{{cite book
| last1 = Calabrese |first1 =Marcello|title =Proceedings of 2013 International Conference on IC Design & Technology (ICICDT)|chapter =Accelerated reliability testing of flash memory: Accuracy and issues on a 45nm NOR technology| date = May 2013 | chapter-url = https://ieeexplore.ieee.org/document/6563298 |pages =37–40| doi = 10.1109/ICICDT.2013.6563298 |isbn =978-1-4673-4743-3|s2cid =37127243| access-date = June 22, 2022}}</ref>

===Memory wear===
Another limitation is that flash memory has a finite number of program–erase cycles (typically written as P/E&nbsp;cycles).<ref name="snia-2009-04">{{Cite tech report |url=https://www.snia.org/sites/default/files/SSSI_NAND_Reliability_White_Paper_0.pdf |title=NAND Flash Solid State Storage for the Enterprise, An In-depth Look at Reliability |last=Thatcher |first=Jonathan |last2=Coughlin |first2=Tom |date=April 2009 |publisher=Solid State Storage Initiative (SSSI) of the Storage Network Industry Association (SNIA) |last3=Handy |first3=Jim |last4=Ekker |first4=Neal |access-date=6 December 2011 |archive-url=https://web.archive.org/web/20111014033413/http://snia.org/sites/default/files/SSSI_NAND_Reliability_White_Paper_0.pdf |archive-date=14 October 2011 |url-status=live }}</ref><ref name="kingston-slc-mlc-tlc">{{Cite web |date=February 2022 |title=Difference between SLC, MLC, TLC and 3D NAND in USB flash drives, SSDs and memory cards |url=https://www.kingston.com/en/blog/pc-performance/difference-between-slc-mlc-tlc-3d-nand |url-status=live |archive-url=https://web.archive.org/web/20231128154805/https://www.kingston.com/en/blog/pc-performance/difference-between-slc-mlc-tlc-3d-nand |archive-date=28 November 2023 |publisher=[[Kingston Technology]] }}</ref> [[Micron Technology]] and [[Sun Microsystems]] announced an SLC&nbsp;NAND flash memory chip rated for 1,000,000&nbsp;P/E&nbsp;cycles on 17 December 2008.<ref name="micron-20081217">{{Cite press release |last=Bordner |first=Kirstin |date=17 December 2008 |title=Micron Collaborates with Sun Microsystems to Extend Lifespan of Flash-Based Storage, Achieves One Million Write Cycles |url=https://investors.micron.com/news-releases/news-release-details/micron-collaborates-sun-microsystems-extend-lifespan-flash-based |url-status=live |archive-url=https://web.archive.org/web/20220320082948/https://investors.micron.com/news-releases/news-release-details/micron-collaborates-sun-microsystems-extend-lifespan-flash-based |archive-date=20 March 2022 |publisher=[[Micron Technology]] |place=Boise, Idaho }}</ref>

The guaranteed cycle count may apply only to block zero (as is the case with [[Thin small-outline package|TSOP]]&nbsp;NAND devices), or to all blocks (as in NOR). This effect is mitigated in some chip firmware or file system drivers by counting the writes and dynamically remapping blocks in order to spread write operations between sectors; this technique is called [[wear leveling]]. Another approach is to perform write verification and remapping to spare sectors in case of write failure, a technique called [[Bad sector|bad block]] management (BBM). For portable consumer devices, these wear out management techniques typically extend the life of the flash memory beyond the life of the device itself, and some data loss may be acceptable in these applications. For high-reliability data storage, however, it is not advisable to use flash memory that would have to go through a large number of programming cycles. This limitation also exists for "read-only" applications such as [[thin client]]s and [[Router (computing)|routers]], which are programmed only once or at most a few times during their lifetimes, due to ''[[#Read disturb|read disturb]]'' (see below).

In December 2012, Taiwanese engineers from Macronix revealed their intention to announce at the 2012 IEEE International Electron Devices Meeting that they had figured out how to improve NAND&nbsp;flash storage read/write cycles from 10,000 to 100 million cycles using a "self-healing" process that used a flash chip with "onboard heaters that could anneal small groups of memory cells."<ref name="phys-20121202">{{Cite news |last=Owano |first=Nancy |date=2 December 2012 |title=Taiwan engineers defeat limits of flash memory |work=phys.org |url=https://phys.org/news/2012-12-taiwan-defeat-limits-memory.html |url-status=live |archive-url=https://web.archive.org/web/20160209010327/http://phys.org/news/2012-12-taiwan-defeat-limits-memory.html |archive-date=9 February 2016 }}</ref> The built-in thermal annealing was to replace the usual erase cycle with a local high temperature process that not only erased the stored charge, but also repaired the electron-induced stress in the chip, giving write cycles of at least 100 million.<ref name="register-20121203">{{Cite news |last=Sharwood |first=Simon |date=3 December 2012 |title=Flash memory made immortal by fiery heat |work=[[The Register]] |url=https://www.theregister.co.uk/2012/12/03/macronix_thermal_annealing_extends_life_of_flash_memory/ |url-status=live |archive-url=https://web.archive.org/web/20170913183926/https://www.theregister.co.uk/2012/12/03/macronix_thermal_annealing_extends_life_of_flash_memory/ |archive-date=13 September 2017 }}</ref> The result was to be a chip that could be erased and rewritten over and over, even when it should theoretically break down. As promising as Macronix's breakthrough might have been for the mobile industry, however, there were no plans for a commercial product featuring this capability to be released any time in the near future.<ref name="yahoo1">{{Cite news |last=Wong |first=Raymond |date=4 December 2012 |title=Flash memory breakthrough could lead to even more reliable data storage |work=[[Yahoo! News]] |url=https://news.yahoo.com/flash-memory-breakthrough-could-lead-even-more-reliable-124049340.html |url-status=live |archive-url=https://web.archive.org/web/20231102140438/https://news.yahoo.com/flash-memory-breakthrough-could-lead-even-more-reliable-124049340.html |archive-date=2 November 2023 }}</ref>

===Read disturb===
The method used to read NAND&nbsp;flash memory can cause nearby cells in the same memory block to change over time (become programmed). This is known as read disturb. The threshold number of reads is generally in the hundreds of thousands of reads between intervening erase operations. If reading continually from one cell, that cell will not fail but rather one of the surrounding cells will on a subsequent read. To avoid the read disturb problem the flash controller will typically count the total number of reads to a block since the last erase. When the count exceeds a target limit, the affected block is copied over to a new block, erased, then released to the block pool. The original block is as good as new after the erase. If the flash controller does not intervene in time, however, a '''read disturb''' error will occur with possible data loss if the errors are too numerous to correct with an [[error-correcting code]].<ref name="micron-tn-29-17">{{Cite web |date=April 2010 |title=NAND Flash Design and Use Considerations Introduction |url=https://media-www.micron.com/-/media/client/global/documents/products/technical-note/nand-flash/tn2917.pdf |url-status=live |archive-url=https://web.archive.org/web/20220303140013/https://media-www.micron.com/-/media/client/global/documents/products/technical-note/nand-flash/tn2917.pdf |archive-date=3 March 2022 |access-date=29 July 2011 |publisher=[[Micron Technology]] |id=TN-29-17 }}</ref><ref name=NEA>{{cite web |title=Technology For Managing NAND Flash |last=Kawamatus |first=Tatsuya |publisher=Hagiwara sys-com co., LTD |access-date=15 May 2018 |url=http://read.pudn.com/downloads151/ebook/654250/0808002.pdf |archive-url=https://web.archive.org/web/20180515164812/http://read.pudn.com/downloads151/ebook/654250/0808002.pdf |archive-date=2018-05-15 |url-status=dead }}</ref><ref name="flash-memory-summit">{{Cite conference |date=August 2007 |title=The Inconvenient Truths of NAND Flash Memory |url=https://www.dslreports.com/r0/download/1507743~59e7b9dda2c0e0a0f7ff119a7611c641/flash_mem_summit_jcooke_inconvenient_truths_nand.pdf |conference=Flash Memory Summit 2007 |publisher=[[Micron Technology]] |archive-url=https://web.archive.org/web/20180215023326/http://www.dslreports.com/r0/download/1507743~59e7b9dda2c0e0a0f7ff119a7611c641/flash_mem_summit_jcooke_inconvenient_truths_nand.pdf |archive-date=15 February 2018 |last1=Cooke |url-status=live |first1=Jim }}</ref>

===X-ray effects===
Most flash ICs come in [[ball grid array]] (BGA) packages, and even the ones that do not are often mounted on a PCB next to other BGA packages. After [[PCB Assembly]], boards with BGA packages are often X-rayed to see if the balls are making proper connections to the proper pad, or if the BGA needs [[rework (electronics)|rework]]. These X-rays can erase programmed bits in a flash chip (convert programmed "0" bits into erased "1" bits). Erased bits ("1" bits) are not affected by X-rays.<ref>
Richard Blish.
[http://www.spansion.com/Support/Application%20Notes/Dose_Minimization_Xray_Inspect_AN.pdf "Dose Minimization During X-ray Inspection of Surface-Mounted Flash ICs"] {{webarchive|url=https://web.archive.org/web/20160220204227/http://www.spansion.com/Support/Application%20Notes/Dose_Minimization_Xray_Inspect_AN.pdf |date=20 February 2016 }}.
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Richard Blish.
[http://www.spansion.com/Support/Application%20Notes/X-ray_inspection_on_flash_AN.pdf "Impact of X-Ray Inspection on Spansion Flash Memory"] {{webarchive|url=https://web.archive.org/web/20160304044211/http://www.spansion.com/Support/Application%20Notes/X-ray_inspection_on_flash_AN.pdf |date=4 March 2016 }}
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Some manufacturers are now making X-ray proof SD<ref>{{cite web |url= https://www.sandisk.com/home/memory-cards/sd-cards/extremepro-sd-uhs-i |title= SanDisk Extreme PRO SDHC/SDXC UHS-I Memory Card |access-date= 2016-02-03 |url-status= live |archive-url= https://web.archive.org/web/20160127214859/https://www.sandisk.com/home/memory-cards/sd-cards/extremepro-sd-uhs-i |archive-date= 27 January 2016}}</ref> and USB<ref>{{cite web |url= http://www.samsung.com/us/computer/memory-storage-accessories/MUF-32BB/AM |title= Samsung 32GB USB 3.0 Flash Drive FIT MUF-32BB/AM |access-date= 2016-02-03 |url-status= live |archive-url= https://web.archive.org/web/20160203145010/http://www.samsung.com/us/computer/memory-storage-accessories/MUF-32BB/AM |archive-date= 3 February 2016}}</ref> memory devices.