Editing One-instruction set computer (section)

=== Transport triggered architecture ===
{{Main|Transport triggered architecture}}
A transport triggered architecture uses only the ''move'' instruction, hence it was originally called a "move machine". This instruction moves the contents of one memory location to another memory location combining with the current content of the new location:<ref name=caamp />{{rp|42}}<ref name=dwj />

 '''Instruction''' <syntaxhighlight lang="nasm" inline>movx a, b</syntaxhighlight> (also written ''a'' -> ''b'')
     OP = GetOperation(Mem[''b''])
     Mem[''b''] := OP(Mem[''a''], Mem[''b''])

The operation performed is defined by the destination memory cell. Some cells are specialized in addition, some other in multiplication, etc. So memory cells are not simple store but coupled with an [[arithmetic logic unit]] (ALU) setup to perform only one sort of operation with the current value of the cell. Some of the cells are [[control flow]] instructions to alter the program execution with jumps, [[Addressing mode#Conditional execution|conditional execution]], [[subroutines]], [[if-then-else]], [[for-loop]], etc...

A commercial transport triggered architecture microcontroller has been produced called MAXQ, which hides the apparent inconvenience of an OISC by using a "transfer map" that represents all possible destinations for the ''move'' instructions.<ref name=deh />