Editing CPU cache (section)

===Homonym and synonym problems===
A cache that relies on virtual indexing and tagging becomes inconsistent after the same virtual address is mapped into different physical addresses ([[homonym]]), which can be solved by using physical address for tagging, or by storing the address space identifier in the cache line. However, the latter approach does not help against the [[synonym]] problem, in which several cache lines end up storing data for the same physical address. Writing to such locations may update only one location in the cache, leaving the others with inconsistent data. This issue may be solved by using non-overlapping memory layouts for different address spaces, or otherwise the cache (or a part of it) must be flushed when the mapping changes.<ref>{{cite web |last1=Roscoe |first1=Timothy |last2=Baumann |first2=Andrew |date=2009-03-03 |title=Advanced Operating Systems Caches and TLBs (263-3800-00L) |url=http://www.systems.ethz.ch/education/courses/fs09/aos/lectures/wk3-print.pdf |url-status=dead |archive-url=https://web.archive.org/web/20111007150424/http://www.systems.ethz.ch/education/past-courses/fs09/aos/lectures/wk3-print.pdf |archive-date=2011-10-07 |access-date=2016-02-14 |website=systems.ethz.ch}}</ref>