Editing Branch predictor (section)

==External links==
* Seznec et al. (1996). "[http://citeseer.ist.psu.edu/seznec96multipleblock.html Multiple-Block Ahead Branch Predictors] {{Webarchive|url=https://web.archive.org/web/20080720104952/http://citeseer.ist.psu.edu/seznec96multipleblock.html |date=2008-07-20 }}"{{snd}} demonstrates prediction accuracy is not impaired by indexing with previous branch address.
* Seznec et al. (2002). "[http://citeseer.ist.psu.edu/seznec02design.html Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor] {{Webarchive|url=https://web.archive.org/web/20080720104620/http://citeseer.ist.psu.edu/seznec02design.html |date=2008-07-20 }}"{{snd}} describes the Alpha EV8 branch predictor. This paper does an excellent job discussing how they arrived at their design from various hardware constraints and simulation studies.
* Jimenez (2003). "[http://citeseer.ist.psu.edu/jimenez03reconsidering.html Reconsidering Complex Branch Predictors] {{Webarchive|url=https://web.archive.org/web/20071227070021/http://citeseer.ist.psu.edu/jimenez03reconsidering.html |date=2007-12-27 }}"{{snd}} describes the EV6 and K8 branch predictors, and pipelining considerations.
* {{cite web |author-last=Fog |author-first=Agner |title=The microarchitecture of Intel, AMD and VIA CPUs |date=2009 |url=http://www.agner.org/optimize/#manuals |access-date=2009-10-01}}
* {{cite web |title=Branch and Loop Reorganization to Prevent Mispredicts |author-last=Andrews |author-first=Jeff |work=Intel Software Network |date=2007-10-30 |access-date=2018-11-10 |url=https://software.intel.com/en-us/articles/branch-and-loop-reorganization-to-prevent-mispredicts |archive-url=https://web.archive.org/web/20181111133652/https://software.intel.com/en-us/articles/branch-and-loop-reorganization-to-prevent-mispredicts |archive-date=2018-11-11 |url-status=dead}}
* {{cite web |title=What is Branch Prediction? – Stack Overflow Example |author-last=Yee |author-first=Alexander |url=https://stackoverflow.com/questions/11227809/why-is-processing-a-sorted-array-faster-than-an-unsorted-array#11227902}}

{{CPU technologies}}

[[Category:Instruction processing]]
[[Category:Speculative execution]]