Editing Central processing unit (section)

===Hardware performance counter===
{{Main|Hardware performance counter}}
Many modern architectures (including embedded ones) often include [[hardware performance counter]]s (HPC), which enables low-level (instruction-level) collection, [[Benchmark (computing)|benchmarking]], debugging or analysis of running software metrics.<ref>{{Cite conference|last1=Uhsadel|first1=Leif|last2=Georges|first2=Andy|last3=Verbauwhede|first3=Ingrid|date=August 2008|title=Exploiting Hardware Performance Counters|url=https://ieeexplore.ieee.org/document/4599558|conference=2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography|pages=59–67|doi=10.1109/FDTC.2008.19|isbn=978-0-7695-3314-8|s2cid=1897883|access-date=2021-12-30|archive-date=2021-12-30|archive-url=https://web.archive.org/web/20211230134328/https://ieeexplore.ieee.org/document/4599558/|url-status=live|url-access=subscription}}</ref><ref>{{Cite conference|last=Rohou|first=Erven|date=September 2012|title=Tiptop: Hardware Performance Counters for the Masses|url=https://ieeexplore.ieee.org/document/6337508|conference=2012 41st International Conference on Parallel Processing Workshops|pages=404–413|doi=10.1109/ICPPW.2012.58|isbn=978-1-4673-2509-7|s2cid=16160098|access-date=2021-12-30|archive-date=2021-12-30|archive-url=https://web.archive.org/web/20211230134326/https://ieeexplore.ieee.org/document/6337508/|url-status=live}}</ref> HPC may also be used to discover and analyze unusual or suspicious activity of the software, such as [[return-oriented programming]] (ROP) or [[sigreturn-oriented programming]] (SROP) exploits etc.<ref>{{Cite web|last1=Herath|first1=Nishad|last2=Fogh|first2=Anders|date=2015|title=CPU Hardware Performance Counters for Security|url=https://www.blackhat.com/docs/us-15/materials/us-15-Herath-These-Are-Not-Your-Grand-Daddys-CPU-Performance-Counters-CPU-Hardware-Performance-Counters-For-Security.pdf|url-status=live|publisher=Black Hat|location=USA|archive-url=https://web.archive.org/web/20150905090843/https://www.blackhat.com/docs/us-15/materials/us-15-Herath-These-Are-Not-Your-Grand-Daddys-CPU-Performance-Counters-CPU-Hardware-Performance-Counters-For-Security.pdf |archive-date=2015-09-05 }}</ref> This is usually done by software-security teams to assess and find malicious binary programs.<ref>{{Cite book |last=Jøsang |first=Audun |url=https://books.google.com/books?id=-kFmDwAAQBAJ&dq=usually+done+by+software-security+teams+to+assess+and+find+malicious+binary+programs.&pg=PA96 |title=ECCWS 2018 17th European Conference on Cyber Warfare and Security V2 |date=2018-06-21 |publisher=Academic Conferences and publishing limited |isbn=978-1-911218-86-9 |language=en}}</ref>

Many major vendors (such as [[IBM]], [[Intel]], [[AMD]], and [[Arm Holdings|Arm]]) provide software interfaces (usually written in C/C++) that can be used to collect data from the CPU's [[hardware register|register]]s in order to get metrics.<ref>{{Citation|last=DeRose|first=Luiz A.|title=The Hardware Performance Monitor Toolkit|date=2001|url=http://link.springer.com/10.1007/3-540-44681-8_19|work=Euro-Par 2001 Parallel Processing|series=Lecture Notes in Computer Science|volume=2150|pages=122–132|editor-last=Sakellariou|editor-first=Rizos|place=Berlin, Heidelberg|publisher=Springer Berlin Heidelberg|language=en|doi=10.1007/3-540-44681-8_19|isbn=978-3-540-42495-6|access-date=2021-12-30|editor2-last=Gurd|editor2-first=John|editor3-last=Freeman|editor3-first=Len|editor4-last=Keane|editor4-first=John|archive-date=2023-03-01|archive-url=https://web.archive.org/web/20230301143920/https://link.springer.com/chapter/10.1007/3-540-44681-8_19|url-status=live|url-access=subscription}}</ref> Operating system vendors also provide software like <code>[[Perf (Linux)|perf]]</code> (Linux) to record, [[Benchmark (computing)|benchmark]], or [[Tracing (software)|trace]] CPU events running kernels and applications.

Hardware counters provide a low-overhead method for collecting comprehensive performance metrics related to a CPU's core elements (functional units, caches, main memory, etc.) – a significant advantage over software profilers.<ref>{{Cite web |title=TOWARDS A BENCHMARK FOR PERFORMANCE AND POWER CONSUMPTION EVALUATION OF PARALLEL PROGRAMMING INTERFACES |url=https://dspace.unipampa.edu.br/bitstream/riu/4136/1/Adriano%20Marques%20Garcia%20-%202019.pdf |access-date=2024-03-15 |language=vi}}</ref> Additionally, they generally eliminate the need to modify the underlying source code of a program.<ref>{{Cite book |last1=Chawdhury |first1=Tarun Kumar |url=https://books.google.com/books?id=8f34EAAAQBAJ&dq=benefit+of+using+them+is+that+no+source+code+modifications+are+needed+in+general.&pg=PA117 |title=Mastering Secure Java Applications: Navigating security in cloud and microservices for Java |last2=Banerjee |first2=Joyanta |last3=Gupta |first3=Vipul |last4=Poddar |first4=Debopam |date=2024-03-04 |publisher=BPB Publications |isbn=978-93-5551-884-2 |pages=117 |edition=English |language=en}}</ref> Because hardware designs differ between architectures, the specific types and interpretations of hardware counters will also change.