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Addressing mode
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===PC-relative=== +------+------+---------+----------------+ | load | reg1 | base=PC | offset | +------+------+---------+----------------+ reg1 := RAM[PC + offset] (Effective address = PC + offset) The PC-relative addressing mode can be used to load a register with a value stored in program memory a short distance away from the current instruction. It can be seen as a special case of the "base plus offset" addressing mode, one that selects the program counter (PC) as the "base register". There are a few CPUs that support PC-relative data references. Such CPUs include: The [[x86-64]] architecture and the 64-bit [[ARMv8-A]] architecture<ref>{{cite web|url=https://quequero.org/2014/04/introduction-to-arm-architecture/|title=Introduction to ARMv8 64-bit Architecture|date = 9 April 2014|work = UIC Academy |publisher = quequero.org}}</ref> have PC-relative addressing modes, called "RIP-relative" in x86-64 and "literal" in ARMv8-A. The [[Motorola 6809]] also supports a PC-relative addressing mode. The [[PDP-11]] architecture, the [[VAX]] architecture, and the 32-bit [[ARM architecture]]s support PC-relative addressing by having the PC in the register file. The [[IBM]] [[z/Architecture]] includes specific instructions, e.g., Load Relative Long, with PC-relative addressing if the General-Instructions-Extension Facility is active. When this addressing mode is used, the compiler typically places the constants in a [[literal pool]] immediately before or immediately after the subroutine that uses them, to prevent accidentally executing those constants as instructions. This addressing mode, which always fetches data from memory or stores data to memory and then sequentially falls through to execute the next instruction (the effective address points to data), should not be confused with "PC-relative branch" which does not fetch data from or store data to memory, but instead branches to some other instruction at the given offset (the effective address points to an executable instruction).
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