Editing USB (section)

== Signaling ==
{{Main|USB communications#Signaling (USB PHY)}}

USB signals are transmitted using [[differential signaling]] on [[twisted-pair]] data wires with {{nowrap|90 [[ohm|Ω]] ± 15%}} [[characteristic impedance]].<ref>{{cite web |title=USB in a NutShell&nbsp;— Chapter 2: Hardware |url=http://www.beyondlogic.org/usbnutshell/usb2.htm |publisher=Beyond Logic.org |access-date=25 August 2007 |url-status=live |archive-url=https://web.archive.org/web/20070820221226/http://www.beyondlogic.org/usbnutshell/usb2.htm |archive-date=20 August 2007 }}</ref> USB 2.0 and earlier specifications define a single pair in [[half-duplex]] (HDx). USB 3.0 and later specifications define one dedicated pair for USB 2.0 compatibility and two or four pairs for data transfer: two data wire pairs realising full-duplex (FDx) for single lane  (''×1'') variants require at least SuperSpeed (SS) connectors; four pairs realising full-duplex for two lane (''×2'') variants require USB-C connectors.

USB4 Gen 4 requires the use of all four pairs but allow for asymmetrical pairs configuration.<ref>{{Cite web |title=USB4 Specification v2.0 {{!}} USB-IF |url=https://www.usb.org/document-library/usb4r-specification-v20 |access-date=2023-07-22 |website=www.usb.org}}</ref> In this case one data wire pair is used for the upstream data and the other three for the downstream data or vice-versa. USB4 Gen 4 use [[pulse amplitude modulation]] on 3 levels, providing a [[Ternary numeral system|trit]] of information every [[baud]] transmitted, the transmission frequency of 12.8&nbsp;GHz translate to a transmission rate of 25.6&nbsp;GBd<ref>{{Cite web |title=USB4 Version 2.0 from Simulation to Tx, Rx, and Interconnect Test {{!}} Signal Integrity Journal |url=https://www.signalintegrityjournal.com/articles/3114-usb4-version-20-from-simulation-to-tx-rx-and-interconnect-test |access-date=2023-07-22 |website=www.signalintegrityjournal.com |language=en}}</ref> and the 11-bit–to–7-trit translation provides a theoretical maximum transmission speed just over 40.2&nbsp;Gbit/s.<ref>{{Cite web |title=Welcome to the 80Gpbs Ultra-High Speed Era of USB4 {{!}} GraniteRiverLabs |url=https://www.graniteriverlabs.com/en-us/technical-blog/usb4-80-cio80 |access-date=2023-07-22 |website=www.graniteriverlabs.com |language=en-us}}</ref>
{{mw-datatable}}
{| class="wikitable sortable mw-datatable" style="text-align:center;"
|+ USB Data operation modes|
! colspan="2" |Operation mode name
! rowspan="2" |Introduced in
! rowspan="2" |Lanes
! rowspan="2" |[[Line code|Encoding]]
! rowspan="2" | # data wires
! rowspan="2" data-sort-type=number | Nominal signaling  rate
! rowspan="2" |Original label
! colspan="2" |[[USB-IF]] current<ref name="USB data performance language usage 2024-01"/>
|-
! current
! class=unsortable | old
! marketing name
! class=unsortable | logo
|-
|Low-Speed
| rowspan="3" {{CNone}}
| rowspan="2" |USB 1.0
| rowspan="3" |1 [[half-duplex|HDx]]
| rowspan="3" |[[NRZI]]
| rowspan="3" | 2
| data-sort-value=0.001 | 1.5 Mbit/s<br />half-duplex
| Low-Speed USB (LS)
| rowspan="2" |Basic-Speed USB
| rowspan="2" |[[File:Certified USB.svg|50x50px]]
|-
|Full-Speed
| data-sort-value=0.012 | 12&nbsp;Mbit/s<br />half-duplex
|Full-Speed USB (FS)
|-
|High-Speed
|USB 2.0
| data-sort-value=0.480 | 480&nbsp;Mbit/s<br />half-duplex
|colspan=2|Hi-Speed USB (HS)
| [[File:Certified Hi-Speed USB.svg|50px]]
|-
|USB 3.2 Gen&nbsp;1{{Abbr|×1|single-lane}}
|USB&nbsp;3.0,<br />USB&nbsp;3.1 Gen&nbsp;1
|[[USB 3.0]]
| rowspan="2" |1 [[Full duplex|FDx]] (+ 1 HDx){{efn|name="HDx"}}
|[[8b/10b]]
| rowspan="2" |6
|5 <abbr>Gbit/s</abbr><br />symmetric
|SuperSpeed USB (SS)
|USB 5Gbit/s
|[[File:USB 5Gbps logo.svg|50px]]
|-
|USB&nbsp;3.2 Gen&nbsp;2{{Abbr|×1|single-lane}}
|USB&nbsp;3.1&nbsp;Gen&nbsp;2
|USB 3.1
|[[128b/132b]]
|10 <abbr>Gbit/s</abbr><br />symmetric
|SuperSpeed+ (SS+)
|rowspan="2" |USB 10Gbit/s
|rowspan="2" |[[File:USB 10Gbps logo.svg|50px]]
|-
|USB&nbsp;3.2 Gen&nbsp;1{{Abbr|×2|two-lane}}
|rowspan="9" {{CNone}}
|rowspan="2" |USB&nbsp;3.2
| rowspan="2" | 2 FDx (+ 1 HDx){{efn|name="HDx"}}
|8b/10b
| rowspan="2" | 10
|10 <abbr>Gbit/s</abbr><br />symmetric
| {{n/a}}
|-
|USB&nbsp;3.2 Gen&nbsp;2{{Abbr|×2|two-lane}}
|128b/132b
|20 <abbr>Gbit/s</abbr><br />symmetric
|SuperSpeed USB 20Gbit/s
|USB 20Gbit/s
|[[File:USB 20Gbps logo.svg|50px]]
|-
|USB4 Gen&nbsp;2{{Abbr|×1|single-lane}}
|rowspan="4" |[[USB4]]
|1 FDx (+ 1 HDx){{efn|name="HDx"}}
| rowspan="2" |64b/66b{{efn|name="rs-fec"}}
|6 (used of 10)
|10 <abbr>Gbit/s</abbr><br />symmetric
| colspan=2| USB 10Gbit/s
|[[File:USB 10Gbps logo.svg|50px]]
|-
|USB4 Gen&nbsp;2{{Abbr|×2|two-lane}}
|2 FDx (+ 1 HDx){{efn|name="HDx"}}
|10
|20 <abbr>Gbit/s</abbr><br />symmetric
|colspan="2" rowspan="2" |USB 20Gbit/s
|rowspan="2" |[[File:USB 20Gbps logo.svg|50px]]
|-
|USB4 Gen&nbsp;3{{Abbr|×1|single-lane}}
|1 FDx (+ 1 HDx){{efn|name="HDx"}}
| rowspan="2" |128b/132b{{efn|name="rs-fec"}}
|6 (used of 10)
|20 <abbr>Gbit/s</abbr><br />symmetric
|-
|USB4 Gen&nbsp;3{{Abbr|×2|two-lane}}
|2 FDx (+ 1 HDx){{efn|name="HDx"}}
|10
|40 <abbr>Gbit/s</abbr><br />symmetric
| colspan=2 | USB 40Gbit/s
|[[File:USB 40Gbps logo 01.svg|50px]]
|-
| rowspan="3" |USB4 Gen&nbsp;4{{Abbr|×2|two-lane}}
| rowspan="3" |USB4 2.0
|2 FDx (+ 1 HDx){{efn|name="HDx"}}
| rowspan="3" |[[Pulse-amplitude modulation|PAM-3]] 11b/7[[Ternary numeral system|t]]
| rowspan="3" |10
|80 Gbit/s<br />symmetric
| colspan=2 | USB 80Gbit/s
|[[File:USB 80Gbps logo.svg|50px]]
|-
| rowspan="2" | asymmetric (+ 1 HDx){{efn|name="HDx"}}
|40&nbsp;Gbit/s&nbsp;up<br />120&nbsp;Gbit/s down
| colspan="3" rowspan="2" {{N/A}}
|-
|120&nbsp;Gbit/s&nbsp;up<br />40&nbsp;Gbit/s down
|}

{{notelist|refs=
{{efn|name="rs-fec"| USB4 can use optional [[Reed–Solomon]] [[Error correction code#Forward error correction|forward error correction]] (RS FEC). In this mode, 12 × 16&nbsp;B (128&nbsp;bit) symbols are assembled together with 2&nbsp;B (12&nbsp;bit + 4&nbsp;bit reserved) synchronization bits indicating the respective symbol types and 4&nbsp;B of RS FEC to allow to correct up to 1&nbsp;B of errors anywhere in the total 198&nbsp;B block.}}

{{efn|name="HDx"|USB 2.0 implementation}}
}}

* '''Low-speed (LS)''' and '''Full-speed (FS)''' modes use a single data wire pair, labeled D+ and D−, in [[half-duplex]]. Transmitted signal levels are {{nowrap|0.0–0.3 V}} for logical low, and {{nowrap|2.8–3.6 V}} for logical high level. The signal lines are not [[electrical termination|terminated]].
* '''High-speed (HS)''' uses the same wire pair, but with different electrical conventions. Lower signal voltages of {{nowrap|−10 to 10 mV}} for low and {{nowrap|360 to 440 mV}} for logical high level, and termination of 45&nbsp;Ω to ground or 90&nbsp;Ω differential to match the data cable impedance.
* '''SuperSpeed (SS)''' adds two additional pairs of shielded twisted data wires (and new, mostly compatible expanded connectors) besides another grounding wire. These are dedicated to full-duplex SuperSpeed operation. The SuperSpeed link operates independently from the USB&nbsp;2.0 channel and takes precedence on connection. Link configuration is performed using LFPS (Low Frequency Periodic Signaling, approximately at 20&nbsp;MHz frequency), and electrical features include voltage de-emphasis at the transmitter side, and adaptive linear equalization on the receiver side to combat electrical losses in transmission lines, and thus the link introduces the concept of ''link training''.
* '''SuperSpeed+ (SS+)''' uses a new coding scheme with an increased signaling rate (Gen 2×1 mode) and/or the additional lane of USB-C (Gen 1×2 and Gen 2×2 modes).

A USB connection is always between an ''A'' end, either a ''host'' or a downstream port of a hub, and a ''B'' end, either a ''peripheral device'' or the upstream port of a hub. Historically this was made clear by the fact that hosts had only Type-A and peripheral devices had only Type-B ports, and every compatible cable had one Type-A plug and one Type-B plug. USB-C (Type-C) is a single connector that replaces all legacy Type-A and Type-B connectors, so when both sides are equipment with USB Type-C ports they negotiate which is the ''host'' and which is the ''device''.