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CPU cache
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====Write Coalescing Cache (WCC)==== Write Coalescing Cache<ref>{{cite web |author=Kanter |first=David |date=August 26, 2010 |title=AMD's Bulldozer Microarchitecture β Memory Subsystem Continued |url=http://www.realworldtech.com/bulldozer/9/ |website=Real World Technologies}}</ref> is a special cache that is part of L2 cache in [[AMD]]'s [[Bulldozer (microarchitecture)|Bulldozer microarchitecture]]. Stores from both L1D caches in the module go through the WCC, where they are buffered and coalesced. The WCC's task is reducing number of writes to the L2 cache.
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