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== Communication protocol == In any MicroLan, there is always one [[Master/slave (technology)|master]] in overall charge, which may be a [[personal computer]] or a [[microcontroller]]. The master initiates activity on the bus, simplifying the avoidance of collisions on the bus. Protocols are built into the master's software to detect collisions. After a collision, the master retries the required communication. A 1-Wire network is a single [[open drain]] wire with a single [[pull-up resistor]]. The pull-up resistor pulls the wire up to 3 or 5 volts. The master device and all the slaves each have a single open-drain connection to drive the wire, and a way to sense the state of the wire. Despite the "1-Wire" name, all devices must also have a second conductor for a [[Ground (electricity)|ground]] connection to permit a return current to flow through the data wire.<ref>{{Cite web |title=1-Wire online tutorial. This tutorial will give you an overview of the 1-Wire protocol, its device operation and application solutions. <!-- BOT GENERATED TITLE --> |url=http://www.maxim-ic.com/products/1-wire/flash/overview/index.cfm |archive-url=https://web.archive.org/web/20090502224036/http://www.maxim-ic.com/products/1-wire/flash/overview/index.cfm |archive-date=2009-05-02 |url-status=live |access-date=2009-03-13}}</ref> Communication occurs when a master or slave briefly pulls the bus low, ''i.e.'', connects the pull-up resistor to ground through its output MOSFET. The data wire is high when idle, and so it can also power a limited number of slave devices. Data rates of 16.3 kbit/s can be achieved.<!-- Page 40 --> There is also an overdrive mode that speeds up the communication by a factor of 10.<!-- Page 39 --> A short 1-Wire bus can be driven from a single digital I/O pin on a microcontroller. A [[universal asynchronous receiver-transmitter]] (UART) can also be used.<ref>{{Cite web|title=Using a UART to Implement a 1-Wire Bus Master|website=Analog Devices|url=https://www.analog.com/en/resources/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html|date=10 September 2002|access-date=3 December 2024}}</ref> Specific 1-Wire [[Driver circuit|driver]] and [[Network bridge|bridge]] chips are available. [[USB|Universal Serial Bus]] "bridge" chips are also available. Bridge chips are particularly useful to drive cables longer than 100 m. Up to 300-meter [[twisted pair]]s, ''i.e.'', telephone cables, have been tested by the manufacturer. These extreme lengths require adjustments to the pull-up resistances from {{Nowrap|5 to 1 kΩ}}.<!-- Page 40-41 --> The master starts a transmission with a ''reset'' pulse, which pulls the wire to 0 volts for at least 480 [[microsecond|μs]]. This resets every slave device on the bus. After that, any slave device, if present, shows that it exists with a "presence" pulse: it holds the bus low for at least 60 μs after the master releases the bus. To send a [[binary number]] "1", the bus master sends a very brief ({{Nowrap|1–15 μs}}) low pulse. To send a binary number "0", the master sends a 60 μs low pulse. The falling (negative) edge of the pulse is used to start a [[monostable multivibrator]] in the slave device. The multivibrator in the slave reads the data line about 30 μs after the falling edge. The slave's internal timer is an inexpensive analog timer. It has analog tolerances that affect its timing accuracy. Therefore, the pulses are calculated to be within margins. Therefore, the "0" pulses have to be 60 μs long, and the "1" pulses can't be longer than 15 μs. When receiving data, the master sends a {{nowrap|1–15 μs}} {{nowrap|0 volt}} pulse to start each bit. If the transmitting slave unit wants to send a "1", it does nothing, and the bus goes to the pulled-up voltage. If the transmitting slave wants to send a "0", it pulls the data line to ground for {{Nowrap|60 μs}}. The basic sequence is a reset pulse followed by an eight-bit command, and then data are sent or received in groups of eight bits. When a sequence of data is being transferred, errors can be detected with an eight-bit [[cyclic redundancy check|CRC]] (weak data protection)<!-- I think it's important to point this out --><!-- and who are we to disagree with you? -->. Many devices can share the same bus. Each device on the bus has a 64-bit serial number, of which eight bits are used as a checksum, thus allowing a "universe" of 2<sup>56</sup> (over 7.2 × 10<sup>16</sup>) unique device identities. The [[Bit numbering#Least significant bit|least significant byte]] of the serial number is an eight-bit number that tells the type of the device. The [[Bit numbering#Most significant bit|most significant byte]] is a standard (for the 1-Wire bus) eight-bit CRC.<ref name="maximic_1wire_standard" /><!-- Page 14 --> There are several standard broadcast commands, as well as commands used to address a particular device. The master can send a selection command, then the address of a particular device. The next command is executed only by the addressed device. The 1-Wire bus enumeration protocol, like other [[singulation]] protocols, is an algorithm the master uses to read the address of every device on the bus. Since the address includes the device type and a CRC, recovering the roster of addresses also produces a reliable inventory of the devices on the bus. To find the devices, the master broadcasts an [[enumeration]] command, and then an address, "listening" after each bit of an address. If a slave's address matches all the address bits sent so far, it returns a 0. The master uses this simple behavior to search systematically for valid sequences of address bits. The process is much faster than a brute force search of all possible 56-bit numbers, because as soon as an invalid bit is detected, all subsequent address bits are known to be invalid. The 56-bit address space is searched as a binary tree,<!-- Page 51 --> allowing up to 75 devices to be found per second.<!-- Page 53 with formula --> The order in which device addresses are discovered by this enumeration protocol is deterministic and depends only on the device type and serial number. Bit-reversing these 56 bits yields the order of discovery for devices using Maxim's published algorithm (algorithm defined in Application Note 187<ref>{{Cite web|title=1 Wire Search Algorithm (Application Note 187)|url=https://www.maximintegrated.com/en/design/technical-documents/app-notes/1/187.html|format=PDF| access-date= 2 October 2020}}</ref>). The search algorithm can be implemented in an alternative form, initially searching paths with address bits equal to 1, rather than 0. In this case, inverting the 56 address bits and then reversing them yields the order of discovery. The location of devices on the bus is sometimes significant. For these situations, a microcontroller can use several pins, or the manufacturer has a 1-Wire device that can switch the bus off or pass it on. Software can therefore explore sequential ''bus [[Broadcast domain|domain]]s''.<ref name="maximic_1wire_standard">{{Cite web|title=iButton Overview|url=http://www.maxim-ic.com/products/ibutton/ibuttons/standard.pdf|format=PDF| access-date= 18 December 2008 <!-- Added by DASHBot -->| archive-url= https://web.archive.org/web/20090127003835/http://www.maxim-ic.com/products/ibutton/ibuttons/standard.pdf| archive-date= 27 January 2009 <!-- Added by DASHBot -->}} 081218 maxim-ic.com</ref>
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