Editing Addressing mode (section)

==Important use case==
Some instruction set architectures, such as [[x86|Intel x86]], IBM/360 and its successors, have a '''load effective address''' instruction.<ref>{{
cite manual
 | publisher = [[IBM]]
 | title = z/Architecture - Principles of Operation
 | id = SA22-7832-13
 | date = May 2022
 | edition = Fourteenth
 | section = Load Address
 | section-url = https://www.vm.ibm.com/library/other/22783213.pdf#page=773
 | page = 7-269
 | url = https://www.vm.ibm.com/library/other/22783213.pdf
 | access-date = May 30, 2025
}}</ref> This calculates the effective operand address and loads it into a register, without accessing the memory it refers to. This can be useful when passing the address of an array element to a subroutine. It may also be a clever way of doing more calculations than normal in one instruction; for example, using such an instruction with the addressing mode "base+index+offset" (detailed below) allows one to add two registers and a constant together in one instruction and store the result in a third register.<ref>{{
cite manual
 | publisher = IBM
 | title = IBM System/360 Principles of Operation
 | section = Instruction Use Examples
 | section-url = http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf#page=139
 | url = http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf
 | page = [http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf#page=147 135]
 | id = A22-6821-7
 | date = September 1968
 | access-date = 12 July 2019
}}</ref>